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| 型號： | EVAL-AD5545SDZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD5545 |
| 標準包裝： | 1 |
| 系列： | * |
AD5545/AD5555
Data Sheet
Rev. G | Page 14 of 24
DAC WITH PROGRAMMABLE INPUT
REFERENCE RANGE
Because high voltage references can be costly, users may
consider using one of the DACs, a digital potentiometer, and a
low voltage reference to form a single-channel DAC with a
programmable input reference range. This approach optimizes
the programmable range as well as facilitates future system
upgrades with just software changes. Figure 25 shows this
implementation. VREFAB is in the feedback network, therefore,
WA
WB
N
A
REF_AB
WA
WB
REF
R
2
D
V
R
V
AB
V
–
1
(7)
where:
VREFAB = reference voltage of VREFA and VREFB
VREF = external reference voltage
DA = DAC A digital code in decimal
N = number of bits of DAC
RWB and RWA are digital potentiometer 128-step programmable
resistances and are given by
AB
C
WB
R
D
R
128
(8)
AB
C
WA
R
D
R
128
128
(9)
C
WA
WB
D
R
128
(10)
where DC = digital potentiometer digital code in decimal
(0 ≤ DC ≤ 127).
By putting Equations 7 through 10 together, the following
results:
C
N
A
C
REF
D
V
AB
V
128
2
1
128
1
(11)
Table 9. VREFAB vs. DB and DC of the AD5555
DC
DA
VREFAB
0
X
VREF
32
0
1.33 VREF
32
8192
1.6 VREF
64
0
2 VREF
64
8192
4 VREF
96
0
4 VREF
96
8192
–8 VREF
The output of DAC B is, therefore,
N
B
REF
OB
D
AB
V
2
(12)
where DB is the DAC B digital code in decimal.
The accuracy of VREFAB is affected by the matching of the input
and feedback resistors and, therefore, a digital potentiometer is
used for U4 because of its inherent resistance matching. The
AD7376 is a 30 V or ±15 V, 128-step digital potentiometer. If
15 V or ±7.5 V is adequate for the application, a 256-step
AD5260 digital potentiometer can be used instead.
AD5555
VOUT
VIN
GND
02918- 0- 024
VOB
TRIM
TEMP
POT
U2A
U4
W
AB
U3
5
3
2
4
6
+5V
+15V
V+
–15V
V–
C1
C3
VREFA
VREF
VREF_AB
IOUTA
AGNDA
VDD RFBA
C2
2.2p
OP4177
U2B
VREFB
IOUTB
AGNDB
RFBB
OP4177
U2C
OP4177
ADR03
AD7376
U1A
U1B
Figure 25. DAC with Programmable Input Reference Range
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