參數(shù)資料
型號: EVAL-AD7190EBZ
廠商: Analog Devices Inc
文件頁數(shù): 33/41頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD7190
設(shè)計資源: EVAL-AD7190EBZ Schematic
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 1
位數(shù): 24
采樣率(每秒): 4.8k
數(shù)據(jù)接口: 串行
輸入范圍: ±VREF/增益
在以下條件下的電源(標(biāo)準(zhǔn)): 36.8mW @ 4.8kSPS
工作溫度: -40°C ~ 105°C
已用 IC / 零件: AD7190
已供物品: 板,CD
AD7190
Data Sheet
Rev. C | Page 38 of 40
APPLICATIONS INFORMATION
The AD7190 provides a low-cost, high resolution analog-to-
digital function. Because the analog-to-digital function is
provided by a ∑- architecture, it makes the part more
immune to noisy environments, making it ideal for use in
sensor measurement and industrial and process control
applications.
WEIGH SCALES
Figure 32 shows the AD7190 being used in a weigh scale
application. The load cell is arranged in a bridge network and
gives a differential output voltage between its OUT+ and OUT–
terminals. Assuming a 5 V excitation voltage, the full-scale
output range from the transducer is 10 mV when the sensitivity
is 2 mV/V. The excitation voltage for the bridge can be used to
directly provide the reference for the ADC because the reference
input range includes the supply voltage.
A second advantage of using the AD7190 in transducer-based
applications is that the bridge power-down switch can be fully
utilized to minimize the power consumption of the system. The
bridge power-down switch is connected in series with the cold
side of the bridge. In normal operation, the switch is closed and
measurements can be taken. In applications in which current
consumption is being minimized, the AD7190 can be placed in
standby mode, thus significantly reducing the power consumed
in the application. In addition, the bridge power-down switch
can be opened while in standby mode, thus avoiding unnecessary
power consumption by the front-end transducer. When the part
is taken out of standby mode and the bridge power-down switch
is closed, the user should ensure that the front-end circuitry is
fully settled before attempting a read from the AD7190.
For simplicity, external filters are not included in Figure 32.
However, an R-C antialias filter should be included on each
analog input. This is required because the on-chip digital filter
does not provide any rejection around the modulator sampling
frequency or multiples of this frequency. Suitable values are a
100 Ω resistor in series with each analog input, a 0.1 μF capa-
citor between the analog inputs and 0.01 μF capacitors from
each analog input pin to AGND.
MCLK1 MCLK2
P0/REFIN2(–) P1/REFIN2(+)
DVDD DGND
5V
AIN1
IN+
IN–
OUT–
OUT+
AIN2
AIN3
AIN4
AINCOM
REFIN1(–)
BPDSW
AGND
AD7190
REFIN1(+)
REFERENCE
DETECT
SERIAL
INTERFACE
AND
CONTROL
LOGIC
TEMP
SENSOR
CLOCK
CIRCUITRY
AVDD
AGND
DOUT/RDY
DIN
SCLK
CS
SYNC
P3
P2
AVDD
AGND
Σ-Δ
ADC
PGA
MUX
07640-
024
Figure 32. Typical Application (Weigh Scale)
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