VREF+
鍙冩暩璩囨枡
鍨嬭櫉锛� EVAL-AD7766EDZ
寤犲晢锛� Analog Devices Inc
鏂囦欢闋佹暩锛� 2/25闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� BOARD EVAL AD7766 128KSPS 108DB
妯欐簴鍖呰锛� 1
ADC 鐨勬暩閲忥細 1
浣嶆暩锛� 24
閲囨ǎ鐜囷紙姣忕锛夛細 128k
鏁告摎鎺ュ彛锛� 涓茶
杓稿叆鑼冨湇锛� ±VREF
鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯欐簴锛夛細 15mW @ 128kSPS
宸ヤ綔婧害锛� -40°C ~ 105°C
宸茬敤 IC / 闆朵欢锛� AD7766
宸蹭緵鐗╁搧锛� 鏉�锛孋D
鐩搁棞鐢㈠搧锛� AD7766BRUZ-2-ND - IC ADC 24BIT 32KSPS SAR 16TSSOP
AD7766BRUZ-1-ND - IC ADC 24BIT 64KSPS SAR 16TSSOP
AD7766BRUZ-ND - IC ADC 24BIT 128KSPS SAR 16TSSOP
AD7766BRUZ-RL7-ND - IC ADC 24BIT 128KSPS SAR 16TSSOP
AD7766BRUZ-2-RL7-ND - IC ADC 24BIT 32KSPS SAR 16TSSOP
AD7766BRUZ-1-RL7-ND - IC ADC 24BIT 64KSPS SAR 16TSSOP
AD7766
Rev. C | Page 9 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
06
44
9-
00
6
1
2
3
4
5
7
8
VREF+
REFGND
VIN+
SYNC/PD
AGND
VIN鈥�
AVDD
DVDD
16
15
14
13
12
11
10
9
SDI
MCLK
SCLK
SDO
VDRIVE
DGND
DRDY
CS
AD7766/
AD766-1/
AD7766-2
TOP VIEW
(Not to Scale)
Figure 6. 16-Lead TSSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
AVDD
+2.5 V Analog Power Supply.
2
VREF+
Reference Input for the AD7766/AD7766-1/AD7766-2. An external reference must be applied to this input pin. The
VREF+ input can range from 2.4 V to 5 V. The reference voltage input is independent of the voltage magnitude
applied to the AVDD pin.
3
REFGND
Reference Ground. Ground connection for the reference voltage. The input reference voltage (VREF+) should be
decoupled to this pin.
4
VIN+
Positive Input of the Differential Analog Input.
5
VIN
Negative Input of the Differential Analog Input.
6
AGND
Power Supply Ground for Analog Circuitry.
7
SYNC/PD
Synchronization and Power-Down Input Pin. This pin has dual functionality. It can be used to synchronize multiple
AD7766/AD7766-1/AD7766-2 devices and/or to put the AD7766/AD7766-1/AD7766-2 devices into power-down
mode. See the Power-Down, Reset, and Synchronization section for further details.
8
DVDD
2.5 V Digital Power Supply Input. In cases where a logic voltage of 2.5 V for interfacing is used, (2.5 V applied to
VDRIVE pin), the DVDD and VDRIVE pins may be connected to the same voltage supply rail.
9
VDRIVE
Logic Power Supply Input, 1.8 V to 3.6 V. The voltage supplied at this pin determines the operating voltage of the
digital logic interface.
10
SDO
Serial Data Output. The conversion result from the AD7766/AD7766-1/AD7766-2 is output on the SDO pin as a 24-bit,
twos complement, MSB first, serial data stream.
11
DGND
Digital Logic Power Supply Ground.
12
DRDY
Data Ready Output. A falling edge on the DRDY signal indicates that a new conversion data result is available in the
output register of the AD7766/AD7766-1/AD7766-2. See the
section for
further details.
13
SCLK
Serial Clock Input. The SCLK input provides the serial clock for all serial data transfers with the AD7766/AD7766-1/
AD7766-2 devices. See the AD7766/AD7766-1/AD77662-2 Interface section for further details.
14
MCLK
Master Clock Input. The sampling frequency of the AD7766/AD7766-1/AD7766-2 is equal to the MCLK frequency.
15
SDI
Serial Data Input. This is the daisy-chain input of the AD7766/AD7766-1/AD7766-2. See the Daisy Chaining section
for further details.
16
CS
Chip Select Input. The CS input selects a specific AD7766/AD7766-1/AD7766-2 device and acts as an enable on the
SDO pin. In cases where CS is used, the MSB of the conversion result is clocked onto the SDO line on the CS falling
edge. The CS input allows multiple AD7766/AD7766-1/AD7766-2 devices to share the same SDO line. This allows
the user to select the appropriate device by supplying it with a logic low CS signal, which enables the SDO pin of
the device concerned. See the
section for further details.
鐩搁棞PDF璩囨枡
PDF鎻忚堪
RSM08DSUI CONN EDGECARD 16POS DIP .156 SLD
VI-B3L-EY CONVERTER MOD DC/DC 28V 50W
RMM08DSUI CONN EDGECARD 16POS DIP .156 SLD
GCM12DTAI-S189 CONN EDGECARD 24POS R/A .156 SLD
EVAL-AD7766-1EDZ BOARD EVAL AD7766-1 64KSPS 111DB
鐩搁棞浠g悊鍟�/鎶€琛撳弮鏁�
鍙冩暩鎻忚堪
EVAL-AD7767-1EDZ 鍔熻兘鎻忚堪:BOARD EVAL AD7767-1 64KSPS 111DB RoHS:鏄� 椤炲垾:绶ㄧ▼鍣�锛岄枊鐧�(f膩)绯荤当(t菕ng) >> 瑭曚及鏉� - 妯℃暩杞夋彌鍣� (ADC) 绯诲垪:- 鐢㈠搧鍩硅〒妯″:Obsolescence Mitigation Program 妯欐簴鍖呰:1 绯诲垪:- ADC 鐨勬暩閲�:1 浣嶆暩:12 閲囨ǎ鐜囷紙姣忕锛�:94.4k 鏁告摎鎺ュ彛:USB 杓稿叆鑼冨湇:±VREF/2 鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯欐簴锛�:- 宸ヤ綔婧害:-40°C ~ 85°C 宸茬敤 IC / 闆朵欢:MAX11645 宸蹭緵鐗╁搧:鏉�锛岃粺浠�
EVAL-AD7767-2EDZ 鍔熻兘鎻忚堪:BOARD EVALUATION FOR AD7767 RoHS:鏄� 椤炲垾:绶ㄧ▼鍣�锛岄枊鐧�(f膩)绯荤当(t菕ng) >> 瑭曚及鏉� - 妯℃暩杞夋彌鍣� (ADC) 绯诲垪:- 鐢㈠搧鍩硅〒妯″:Obsolescence Mitigation Program 妯欐簴鍖呰:1 绯诲垪:- ADC 鐨勬暩閲�:1 浣嶆暩:12 閲囨ǎ鐜囷紙姣忕锛�:94.4k 鏁告摎鎺ュ彛:USB 杓稿叆鑼冨湇:±VREF/2 鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯欐簴锛�:- 宸ヤ綔婧害:-40°C ~ 85°C 宸茬敤 IC / 闆朵欢:MAX11645 宸蹭緵鐗╁搧:鏉�锛岃粺浠�
EVAL-AD7767EDZ 鍔熻兘鎻忚堪:BOARD EVAL AD7767 128KSPS 108DB RoHS:鏄� 椤炲垾:绶ㄧ▼鍣�锛岄枊鐧�(f膩)绯荤当(t菕ng) >> 瑭曚及鏉� - 妯℃暩杞夋彌鍣� (ADC) 绯诲垪:- 鐢㈠搧鍩硅〒妯″:Obsolescence Mitigation Program 妯欐簴鍖呰:1 绯诲垪:- ADC 鐨勬暩閲�:1 浣嶆暩:12 閲囨ǎ鐜囷紙姣忕锛�:94.4k 鏁告摎鎺ュ彛:USB 杓稿叆鑼冨湇:±VREF/2 鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯欐簴锛�:- 宸ヤ綔婧害:-40°C ~ 85°C 宸茬敤 IC / 闆朵欢:MAX11645 宸蹭緵鐗╁搧:鏉�锛岃粺浠�
EVAL-AD7780EBZ 鍔熻兘鎻忚堪:BOARD EVAL FOR AD7780 RoHS:鏄� 椤炲垾:绶ㄧ▼鍣紝闁嬬櫦(f膩)绯荤当(t菕ng) >> 瑭曚及鏉� - 妯℃暩杞夋彌鍣� (ADC) 绯诲垪:- 鐢㈠搧鍩硅〒妯″:Obsolescence Mitigation Program 妯欐簴鍖呰:1 绯诲垪:- ADC 鐨勬暩閲�:1 浣嶆暩:12 閲囨ǎ鐜囷紙姣忕锛�:94.4k 鏁告摎鎺ュ彛:USB 杓稿叆鑼冨湇:±VREF/2 鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯欐簴锛�:- 宸ヤ綔婧害:-40°C ~ 85°C 宸茬敤 IC / 闆朵欢:MAX11645 宸蹭緵鐗╁搧:鏉�锛岃粺浠�
EVAL-AD7781EBZ 鍔熻兘鎻忚堪:BOARD EVAL FOR AD7781 RoHS:鏄� 椤炲垾:绶ㄧ▼鍣�锛岄枊鐧�(f膩)绯荤当(t菕ng) >> 瑭曚及鏉� - 妯℃暩杞夋彌鍣� (ADC) 绯诲垪:- 鐢㈠搧鍩硅〒妯″:Obsolescence Mitigation Program 妯欐簴鍖呰:1 绯诲垪:- ADC 鐨勬暩閲�:1 浣嶆暩:12 閲囨ǎ鐜囷紙姣忕锛�:94.4k 鏁告摎鎺ュ彛:USB 杓稿叆鑼冨湇:±VREF/2 鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯欐簴锛�:- 宸ヤ綔婧害:-40°C ~ 85°C 宸茬敤 IC / 闆朵欢:MAX11645 宸蹭緵鐗╁搧:鏉�锛岃粺浠�