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參數(shù)資料
| 型號(hào)： | EVAL-AD7780EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 7/16頁(yè) |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7780 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 16.7 |
| 數(shù)據(jù)接口： | SPI? |
| 輸入范圍： | ±5 V |
| 工作溫度： | -40°C ~ 105°C |
| 已用 IC / 零件： | AD7780 |
| 已供物品： | 板 |
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AD7780
Rev. A | Page 15 of 16
GROUNDING AND LAYOUT
Because the analog input and reference input of the ADC are
differential, most of the voltages in the analog modulator are
common-mode voltages. The excellent common-mode reject-
tion of the part removes common-mode noise on these inputs.
The digital filter provides rejection of broadband noise on the
power supply, except at integer multiples of the modulator sam-
pling frequency. The digital filter also removes noise from the
analog and reference inputs, provided that these noise sources
do not saturate the analog modulator. As a result, the AD7780
is more immune to noise interference than conventional high
resolution converters. However, because the resolution of the
AD7780 is so high, and the noise levels from the AD7780 are so
low, care must be taken with regard to grounding and layout.
The printed circuit board that houses the AD7780 should be
designed such that the analog and digital sections are separated
and confined to certain areas of the board. A minimum etch
technique is generally best for ground planes because it gives
the best shielding.
It is recommended that the GND pin of the AD7780 be tied
to the AGND plane of the system. In any layout, pay attention
to the flow of currents in the system and ensure that the return
paths for all currents are as close as possible to the paths that the
currents took to reach their destinations. Avoid forcing digital
currents to flow through the AGND sections of the layout.
The ground plane of the AD7780 should be allowed to run under
the AD7780 to prevent noise coupling. The power supply lines
to the AD7780 should use as wide a trace as possible to provide
low impedance paths and reduce the effects of glitches on the
power supply line. Fast switching signals such as clocks should
be shielded with digital ground to avoid radiating noise to other
sections of the board, and clock signals should never be run near
the analog inputs. Avoid crossover of digital and analog signals.
Traces on opposite sides of the board should run at right angles
to each other. This reduces the effects of feedthrough through
the board. A microstrip technique is by far the best, but it is not
always possible with a double-sided board. In this technique,
the component side of the board is dedicated to ground planes,
and the signals are placed on the solder side.
Good decoupling is important when using high resolution
ADCs. AVDD should be decoupled with 10 μF tantalum capa-
citors in parallel with 0.1 μF capacitors to GND. DVDD should
be decoupled with 10 μF tantalum capacitors in parallel with
0.1 μF capacitors to GND, with the system’s AGND to DGND
connection kept close to the AD7780. To achieve the best results
from these decoupling components, place them as close as possible
to the device, ideally right up against the device. All logic chips
should be decoupled with 0.1 μF ceramic capacitors to DGND.
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