- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗17053 > EVAL-AD7940CBZ (Analog Devices Inc)BOARD EVALUATION AD7940 PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | EVAL-AD7940CBZ |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 18/20闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | BOARD EVALUATION AD7940 |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| ADC 鐨勬暩(sh霉)閲忥細 | 1 |
| 浣嶆暩(sh霉)锛� | 14 |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | 100k |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | 涓茶 |
| 杓稿叆鑼冨湇锛� | 0 ~ Vdd |
| 鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯�(bi膩o)婧�(zh菙n)锛夛細 | 17mW @ 100kSPS & 5V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 宸茬敤 IC / 闆朵欢锛� | AD7940 |
| 宸蹭緵鐗╁搧锛� | 鏉� |
| 鐩搁棞(gu膩n)鐢�(ch菐n)鍝侊細 | AD7940BRJZ-REEL7DKR-ND - IC ADC 14BIT 100KSPS SOT-23-6 AD7940BRJZ-REEL7CT-ND - IC ADC 14BIT 100KSPS SOT-23-6 AD7940BRJZ-REEL7TR-ND - IC ADC 14BIT 100KSPS SOT-23-6 AD7940BRM-ND - IC ADC 14BIT UNIPOLAR 8-MSOP AD7940BRM-REEL7TR-ND - IC ADC 14BIT UNIPOLAR 8-MSOP |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�鐣�(d膩ng)鍓嶇18闋�绗�19闋�绗�20闋�
AD7940
Rev. A | Page 7 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
03305-0-023
CS
SDATA
SCLK
6
5
4
VDD 1
GND
2
VIN 3
AD7940
TOP VIEW
(Not to Scale)
SOT-23
Figure 3. SOT-23 Pin Configuration
03305-0-003
NC = NO CONNECT
AD7490
MSOP
TOP VIEW
(Not to Scale)
VDD 1
GND
2
GND
3
VIN 4
CS
SDATA
NC
SCLK
8
7
6
5
Figure 4. MSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
SOT-23
Pin No.
MSOP
Mnemonic
Function
1
V
DD
Power Supply Input. The V
DD range for the AD7940 is from 2.5 V to 5.5 V.
2
2, 3
GND
Analog Ground. Ground reference point for all circuitry on the AD7940. All analog input signals should
be referred to this GND voltage.
3
4
V
IN
Analog Input. Single-ended analog input channel. The input range is 0 V to V
DD.
4
5
SCLK
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from this part. This clock
input is also used as the clock source for the AD7940's conversion process.
5
7
SDATA
Data Out. Logic output. The conversion result from the AD7940 is provided on this output as a serial
data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from the
AD7940 consists of two leading zeros followed by 14 bits of conversion data that are provided MSB
first. This will be followed by four trailing zeroes if CS is held low for a total of 24 SCLK cycles. See the
Serial Interface section.
6
8
CS
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on
the AD7940 and framing the serial data transfer.
N/A
6
NC
No Connect. This pin should be left unconnected.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| SDR0503-822JL | INDUCTOR POWER 8200UH 5% SMD |
| VI-B20-EY | CONVERTER MOD DC/DC 5V 50W |
| VE-B1F-EY | CONVERTER MOD DC/DC 72V 50W |
| VE-B1D-EY | CONVERTER MOD DC/DC 85V 50W |
| VE-B1B-EY | CONVERTER MOD DC/DC 95V 50W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| EVAL-AD7942CB | 鍔熻兘鎻忚堪:BOARD EVALUATION FOR AD7942 RoHS:鍚� 椤炲垾:绶ㄧ▼鍣紝闁嬬櫦(f膩)绯荤当(t菕ng) >> 瑭曚及鏉� - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 (ADC) 绯诲垪:PulSAR® 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- ADC 鐨勬暩(sh霉)閲�:1 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:94.4k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:USB 杓稿叆鑼冨湇:±VREF/2 鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯�(bi膩o)婧�(zh菙n)锛�:- 宸ヤ綔婧害:-40°C ~ 85°C 宸茬敤 IC / 闆朵欢:MAX11645 宸蹭緵鐗╁搧:鏉�锛岃粺浠� |
| EVAL-AD7942SDZ | 鍔熻兘鎻忚堪:BOARD EVAL FOR AD7942 RoHS:鏄� 椤炲垾:绶ㄧ▼鍣紝闁嬬櫦(f膩)绯荤当(t菕ng) >> 瑭曚及鏉� - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 (ADC) 绯诲垪:PulSAR® 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- ADC 鐨勬暩(sh霉)閲�:1 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:94.4k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:USB 杓稿叆鑼冨湇:±VREF/2 鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯�(bi膩o)婧�(zh菙n)锛�:- 宸ヤ綔婧害:-40°C ~ 85°C 宸茬敤 IC / 闆朵欢:MAX11645 宸蹭緵鐗╁搧:鏉�锛岃粺浠� |
| EVAL-AD7944EBZ | 鍔熻兘鎻忚堪:BOARD EVAL FOR AD7944 RoHS:鏄� 椤炲垾:绶ㄧ▼鍣�锛岄枊鐧�(f膩)绯荤当(t菕ng) >> 瑭曚及鏉� - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 (ADC) 绯诲垪:PulSAR® 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- ADC 鐨勬暩(sh霉)閲�:1 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:94.4k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:USB 杓稿叆鑼冨湇:±VREF/2 鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯�(bi膩o)婧�(zh菙n)锛�:- 宸ヤ綔婧害:-40°C ~ 85°C 宸茬敤 IC / 闆朵欢:MAX11645 宸蹭緵鐗╁搧:鏉�锛岃粺浠� |
| EVAL-AD7946CBZ | 鍔熻兘鎻忚堪:BOARD EVALUATION FOR AD7946 RoHS:鏄� 椤炲垾:绶ㄧ▼鍣紝闁嬬櫦(f膩)绯荤当(t菕ng) >> 瑭曚及鏉� - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 (ADC) 绯诲垪:PulSAR® 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- ADC 鐨勬暩(sh霉)閲�:1 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:94.4k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:USB 杓稿叆鑼冨湇:±VREF/2 鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯�(bi膩o)婧�(zh菙n)锛�:- 宸ヤ綔婧害:-40°C ~ 85°C 宸茬敤 IC / 闆朵欢:MAX11645 宸蹭緵鐗╁搧:鏉�锛岃粺浠� |
| EVAL-AD7946SDZ | 鍔熻兘鎻忚堪:BOARD EVAL FOR AD7946 RoHS:鍚� 椤炲垾:绶ㄧ▼鍣�锛岄枊鐧�(f膩)绯荤当(t菕ng) >> 瑭曚及鏉� - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 (ADC) 绯诲垪:* 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- ADC 鐨勬暩(sh霉)閲�:1 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:94.4k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:USB 杓稿叆鑼冨湇:±VREF/2 鍦ㄤ互涓嬫浠朵笅鐨勯浕婧愶紙妯�(bi膩o)婧�(zh菙n)锛�:- 宸ヤ綔婧害:-40°C ~ 85°C 宸茬敤 IC / 闆朵欢:MAX11645 宸蹭緵鐗╁搧:鏉匡紝杌熶欢 |
鐧�(f膩)甯冪穵鎬ラ噰璩�锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�
