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參數(shù)資料
型號: EVAL-ADAV4622EBZ
廠商: Analog Devices Inc
文件頁數(shù): 6/28頁
文件大?。?/td> 0K
描述: BOARD EVAL ADAV4622
標準包裝: 1
系列: Advantiv®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: ADAV4622
已供物品:
相關(guān)產(chǎn)品: ADAV4622BSTZ-ND - IC AUD PRO ATV/SIF DECODE 80LQFP
ADAV4622
Rev. B | Page 14 of
28
Pin No.
Mnemonic
Description
16
SDA
I2C Data.
17
SCL
I2C Clock.
18
SPDIF_IN5/LRCLK2
External Input to S/PDIF Mux/Left/Right Clock for SRC2 (Default).
19
SPDIF_IN6/BCLK2
External Input to S/PDIF Mux/Bit Clock for SRC2 (Default).
20
DGND
Digital Ground.
21
DVDD
Digital Supply (1.8 V).
22
SDIN0
Serial Data Input 0/SRC Data Input.
23
SDIN1
Serial Data Input 1/SRC Data Input.
24
SDIN2
Serial Data Input 2/SRC Data Input.
25
SPDIF_IN0/SDIN3
External Input to S/PDIF Mux/SRC Data Input/Serial Data Input 3 (Default).
26
SPDIF_IN1/LRCLK0
External Input to S/PDIF Mux/Left/Right Clock for SRC1 (Default).
27
SPDIF_IN2/BCLK0
External Input to S/PDIF Mux/Bit Clock for SRC1 (Default).
28
ODGND
Digital Ground.
29
ODVDD
Digital Interface Supply (3.3 V).
30
MCLK_OUT
Master Clock Output.
31
DVDD
Digital Supply (1.8 V).
32
DGND
Digital Ground.
33
MCLKI/XIN
Master Clock/Crystal Input.
34
XOUT
Crystal Output.
35
SPDIF_IN4/BCLK1
External Input to S/PDIF Mux/Bit Clock for Serial Data I/O (Default).
36
SPDIF_IN3/LRCLK1
External Input to S/PDIF Mux/Left/Right Clock for Serial Data I/O (Default).
37
SDO0/AD0
Serial Data Output. This pin acts as the I2C address select on reset. It has an internal pull-down
resistor.
38
SPDIF_OUT/SDO1
Output of S/PDIF Mux/Serial Data Output.
39
PWM_READY
PWM Ready Flag.
40
DVDD
Digital Supply (1.8 V).
41
DGND
Digital Ground.
42
PWM1A
Pulse-Width Modulated Output 1A.
43
PWM1B
Pulse-Width Modulated Output 1B.
44
PWM2A
Pulse-Width Modulated Output 2A.
45
PWM2B
Pulse-Width Modulated Output 2B.
46
PWM3A
Pulse-Width Modulated Output 3A.
47
PWM3B
Pulse-Width Modulated Output 3B.
48
PWM4A
Pulse-Width Modulated Output 4A.
49
PWM4B
Pulse-Width Modulated Output 4B.
50
RESET
Reset Analog and Digital Cores.
51
DVDD
Digital Supply (1.8 V).
52
DGND
Digital Ground.
53
AVDD
PLL Supply (3.3 V).
54
PLL_LF
PLL Loop Filter.
55
AGND
PLL Ground.
56
AGND
Headphone Driver Ground.
57
HPOUT1L
Left Headphone Output 1.
58
HPOUT1R
Right Headphone Output 1.
59
AVDD
Headphone Driver Supply (3.3 V).
60
HPOUT2L
Left Headphone Output 2.
61
HPOUT2R
Right Headphone Output 2.
62
AUXOUT3L
Left Auxiliary Output 3.
63
AUXOUT3R
Right Auxiliary Output 3.
64
AUXOUT4L
Left Auxiliary Output 4.
65
AUXOUT4R
Right Auxiliary Output 4.
66
NC
No Connection to this Pin Allowed.
67
FILTD
DAC Filter Capacitor.
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