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參數(shù)資料
| 型號(hào)： | EVAL-ADCMP608BKSZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 11/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADCMP608 SC70-6 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 比較器，單路 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADCMP608 |
| 主要屬性： | CMOS 和 TTL 兼容輸出 |
| 次要屬性： | 關(guān)機(jī)引腳 |
| 已供物品： | 板 |
ADCMP608
Rev. 0 | Page 8 of 12
Q OUTPUT
INPUT VOLTAGE
500mV OVERDRIVE
10mV OVERDRIVE
DISPERSION
VN ± VOS
06
76
9
-01
0
CROSSOVER BIAS POINT
Rail-to-rail inputs of this type, in both op amps and comparators,
have a dual front-end design. Certain devices are active near the
VCC rail and others are active near the VEE rail. At some predeter-
mined point in the common-mode range, a crossover occurs. At
this point, normally VCC/2, the direction of the bias current reverses
and there are changes in measured offset voltages and currents.
The ADCMP608 slightly elaborates on this scheme. Crossover
points can be found at approximately 0.8 V and 1.6 V.
Figure 10. Propagation Delay—Overdrive Dispersion
MINIMUM INPUT SLEW RATE REQUIREMENT
With the rated load capacitance and normal good PC board
design practice, as discussed in the
Q OUTPUT
INPUT VOLTAGE
10V/ns
1V/ns
DISPERSION
VN ± VOS
06
76
9-
01
1
section, these comparators should be stable at any input slew
rate with no hysteresis. Broadband noise from the input stage is
observed in place of the violent chattering seen with most other
high speed comparators. With additional capacitive loading or
poor bypassing, oscillation may be encountered. These oscilla-
tions are due to the high gain bandwidth of the comparator in
combination with feedback through parasitics in the package
and PC board. In many applications, chattering is not harmful.
Figure 11. Propagation Delay—Slew Rate Dispersion
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