ADM3251E
Data Sheet
CHARGE PUMP VOLTAGE CONVERTER
The charge pump voltage converter consists of a 200 kHz
oscillator and a switching matrix. The converter generates a
±10.0 V supply from the input 5.0 V level. This is done in two
stages by using a switched capacitor technique as illustrated in
to 10.0 V by using C1 as the charge storage element. The +10.0 V
level is then inverted to generate 10.0 V using C2 as the
storage element. C3 is shown connected between V+ and VISO,
but is equally effective if connected between V+ and GNDISO.
Capacitor C3 and Capacitor C4 are used to reduce the output
ripple. Their values are not critical and can be increased, if
desired. Larger capacitors (up to 10 μF) can be used in place of
C1, C2, C3, and C4.
5.0 V LOGIC TO EIA/TIA-232E TRANSMITTER
The transmitter driver converts the 5.0 V logic input levels into
RS-232 output levels. When driving an RS-232 load with VCC =
5.0 V, the output voltage swing is typically ±10 V.
GND
C3
C1
S1
S2
S3
S4
V+ = 2VISO
+
INTERNAL
OSCILLATOR
VISO
07388-
016
Figure 16. Charge Pump Voltage Doubler
GNDISO
C4
C2
S1
S2
S3
S4
GNDISO
+
INTERNAL
OSCILLATOR
V+
V– = –(V+)
FROM
VOLTAGE
DOUBLER
07388-
017
Figure 17. Charge Pump Voltage Inverter
EIA/TIA-232E TO 5 V LOGIC RECEIVER
The receiver is an inverting level-shifter that accepts the RS-232
input level and translates it into a 5.0 V logic output level. The
input has an internal 5 kΩ pull-down resistor to ground and is
also protected against overvoltages of up to ±30 V. An uncon-
nected input is pulled to 0 V by the internal 5 kΩ pull-down
resistor. This, therefore, results in a Logic 1 output level for an
unconnected input or for an input connected to GND. The
receiver has a Schmitt-trigger input with a hysteresis level of
0.1 V. This ensures error-free reception for both a noisy input
and for an input with slow transition times.
HIGH BAUD RATE
T
he ADM3251E offers high slew rates, permitting data trans-
mission at rates well in excess of the EIA/TIA-232E specifications.
The RS-232 voltage levels are maintained at data rates up to
460 kbps.
THERMAL ANALYSIS
Ea
ch ADM3251E device consists of three internal die, attached
to a split-paddle lead frame. For the purposes of thermal analysis,
it is treated as a thermal unit with the highest junction temper-
ature reflected in the θJA value from Table 7. The value of θJA is based on measurements taken with the part mounted on a
JEDEC standard 4-layer PCB with fine-width traces in still air.
decreases the thermal resistance to the PCB, allowing increased
thermal margin at high ambient temperatures.
INSULATION LIFETIME
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of
insulation degradation is dependent on the characteristics of the
voltage waveform applied across the insulation. In addition to
the testing performed by the regulatory agencies, Analog
Devices carries out an extensive set of evaluations to determine
the lifetime of the insulation structure within the
ADM3251E.The insulation lifetime of the
ADM3251E depends on the
voltage waveform type imposed across the isolation barrier. The
iCoupler insulation structure degrades at different rates
depending on whether the waveform is bipolar ac, unipolar ac,
different isolation voltage waveforms.
Bipolar ac voltage is the most stringent environment. In the case
of unipolar ac or dc voltage, the stress on the insulation is
significantly lower.
0V
RATED PEAK VOLTAGE
07388-
019
Figure 18. Bipolar AC Waveform
0V
RATED PEAK VOLTAGE
07388-
020
Figure 19. Unipolar AC Waveform
0V
RATED PEAK VOLTAGE
07388-
021
Figure 20. DC Waveform Outline Dimensions
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