ADM3252E
Data Sheet
Rev. A | Page 14 of 16
During the application of power to VCC, the primary side circuitry
(logic side) is held idle until the UVLO preset voltage is reached.
At that time, the data channels are initialized to their default
low output states until they receive data pulses from the
secondary side (RS-232 side).
When the primary side is above the UVLO threshold, the data
input channels sample their inputs and begin sending encoded
pulses to the inactive secondary output channels. The outputs
on the primary side remain in the default low state because no
data comes from the secondary side inputs until secondary side
power is established. The primary side oscillator also begins to
operate, transferring power to the secondary power circuits.
The secondary VISO voltage is below its UVLO limit at this point,
and the secondary side is not generating a regulation control
signal. The primary side power oscillator can free run under
these conditions, supplying the maximum amount of power to
the secondary side.
As the secondary side voltage rises to its regulation setpoint,
a large inrush current transient is present at VCC. Upon reaching
the regulation point, the regulation control circuit produces the
regulation control signal that modulates the oscillator on the
primary side. The VCC current is then reduced and it is propor-
tional to the load current. The duration of the inrush current
depends on the VISO loading conditions and on the current and
voltage available at the VCC pin.
As the secondary side converter begins to accept power from
the primary side, the VISO voltage starts to rise. When the
secondary side UVLO is reached, the secondary side outputs
are initialized to their default low state until data is received
from the corresponding primary side input. It can take up to
1 s after the secondary side is initialized for the state of the
output to correlate to the primary side input.
Secondary side inputs sample their states and transmit them to
the primary side. Outputs are valid about 1 s after the secondary
side becomes active.
Because the rate of charge on the secondary side power supply
is dependent on three factors: loading conditions, the input voltage,
and the selected output voltage level, take care that the design
allows the converter sufficient time to stabilize before valid data
is required.
When power is removed from VCC, the primary side converter
and coupler shut down when the UVLO level is reached. The
secondary side stops receiving power and starts to discharge.
The outputs on the secondary side hold the last state that they
received from the primary side. Either the UVLO level is
reached and the outputs are placed in their high impedance
state, or the outputs detect a lack of activity from the primary
side inputs and the outputs are set to their default low value
before the secondary power reaches UVLO.
THERMAL ANALYSIS
The
ADM3252E device consists of five internal die attached to a
PCB laminate. For the purposes of thermal analysis, the device is
treated as a thermal unit with the highest junction temperature
reflected in the θJA value from Table 2. By following the recommen- decreases, thereby allowing increased thermal margin at high
ambient temperatures.
INSULATION LIFETIME
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of insula-
tion degradation is dependent on the characteristics of the
voltage waveform applied across the insulation. In addition
to the testing performed by the regulatory agencies, Analog
Devices carries out an extensive set of evaluations to determine
the lifetime of the insulation structure within the
ADM3252E.The insulation lifetime of the
ADM3252E depends on the
voltage waveform type imposed across the isolation barrier.
The iCoupler insulation structure degrades at different rates
depending on whether the waveform is bipolar ac, unipolar ac,
isolation voltage waveforms.
Bipolar ac voltage is the most stringent environment. In the
case of unipolar ac or dc voltage, the stress on the insulation is
significantly lower.
Figure 23. Bipolar AC Waveform
Figure 24. Unipolar AC Waveform
Figure 25. DC Waveform
0V
RATED PEAK VOLTAGE
10515-
010
0V
RATED PEAK VOLTAGE
10515-
0
1
0V
RATED PEAK VOLTAGE
10515-
012