參數(shù)資料
型號(hào): EVM647ATF
廠商: Semtech Corporation
英文描述: Pin Electronics Driver, Window Comparator, and Switch Matrix
中文描述: 引腳電子驅(qū)動(dòng)程序,窗口比較器和開關(guān)矩陣
文件頁數(shù): 5/13頁
文件大小: 137K
代理商: EVM647ATF
5
2000 Semtech Corp.
www.semtech.com
EDGE HIGH-PERFORMANCE PRODUCTS
Circuit Description (continued)
Edge647
Load
The Edge647 provides a total of 3 analog switches.
Individual switches vary in both their on resistance and
their on/off time (see Table 4).
Like the driver digital inputs, the switch matrix control inputs
SW0-3 EN* are technology independent as VBB
determines their threshold level. The switch control is
documented in Table 3.
Table 3. Switch Matrix Truth Table
Table 4. Switch Matrix Characteristics
Do NOT leave any digital input pins floating.
Receiver Functionality
The Edge647 supports an on-board window comparator.
CVB and CVA are high impedance analog inputs which
establish the threshold voltages. COMPA and COMPB are
the digital outputs which reflect the real time status of
VINP Table 2 summarizes the relationship between the
threshold levels, VINP and the output signals.
Table 2. Comparator Truth Table
Comparator Outputs
The comparator outputs are 50
output impedance non-
tristatable drivers designed to cleanly drive 50
transmission lines without requiring any external series
termination resistors. Input pins LOW LEVEL and HIGH
LEVEL establish the logic 0 and 1 levels respectively. In
normal operation, LOW LEVEL would be connected to
ground and HIGH LEVEL would be connected to a system
VDD supply, producing CMOS digital swings at the output.
However, the comparator outputs are technology
independent in that they can drive PECL, 3V CMOS, ECL,
LV CMOS, GTL, and custom levels by varying LOW LEVEL
and HIGH LEVEL. For example, should a 3V swing be
desired, HIGH LEVEL could be connected to a 3.0V power
supply.
Notice that HIGH LEVEL and LOW LEVEL provide both the
voltage level and the current for the comparator outputs.
HIGH LEVEL and LOW LEVEL may be varied between +5V
and -2V.
P
N
I
A
P
M
O
C
B
P
M
O
C
A
A
V
V
C
C
<
>
P
P
N
N
I
I
1
0
X
X
B
B
V
V
C
C
<
>
P
P
N
N
I
I
X
X
0
1
s
t
u
p
n
r
n
o
C
s
u
t
a
t
S
1
0
=
=
*
*
N
N
E
E
0
0
W
W
S
S
d
e
e
e
e
n
n
n
o
n
c
o
s
0
0
W
W
S
S
d
c
1
0
=
=
*
*
N
N
E
E
1
1
W
W
S
S
d
e
e
e
e
n
n
n
o
n
c
o
s
1
1
W
W
S
S
d
c
1
0
=
=
*
*
N
N
E
E
W
W
S
S
2
d
e
e
e
e
n
n
n
o
n
c
o
s
2
2
W
W
S
S
d
c
h
c
t
w
S
t
u
o
R
e
m
i
f
O
/
n
O
0
W
S
0
5
s
n
0
0
1
1
W
S
0
5
s
n
0
0
1
2
W
S
0
5
s
n
0
0
1
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