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參數(shù)資料
| 型號： | FAN5068MPX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | DDR-1/DDR-2 plus ACPI Regulator Combo |
| 中文描述： | 1.5 A SWITCHING CONTROLLER, 345 kHz SWITCHING FREQ-MAX, QCC24 |
| 封裝： | 5 X 5 MM, MO-220WHCC, MLP-24 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 159K |
| 代理商： | FAN5068MPX |
FAN5068
PRODUCT SPECIFICATION
REV. 1.0.1 9/9/04
5
8
BOOT
Boot
contains a boot diode to VCC.
High-Side Drive
MOSFET.
Switching Node
Connect to source of high-side MOSFET and low-side MOSFET drain.
Current Sense Input
. Monitors the voltage drop across the lower MOSFET or external
sense resistor for current feedback.
Low-Side Drive
. The low-side (lower) MOSFET driver output. Connect to gate of low-side
MOSFET.
Power Good Flag
. An open-drain output that will pull LOW when FB is outside of a ±10%
range of the 0.9V reference and the LDO outputs are > 80% or < 110% of its reference.
PGOOD goes low when S3 is high. The power good signal from the PWM regulator enables
the VTT regulator and the LDO controller.
VCC
. The IC takes its bias power from this pin. Also used for gate drive power. The IC is held
in standby until this pin is above 4.35V (UVLO threshold).
3.3V LDO Output
. Internal LDO output. Turned off in S0, on in S5 or S3 modes.
S3# Output
. Open-drain output which pulls the gates of two N-Channel blocking MOSFETs
low in S5 and S3. This pin goes high (open) in S0 mode.
S3 Input
. When LOW, turns off the VTT and 1.2V LDO regulators and turns on the 3.3V
regulator. Also causes S3#O to pull low to turn off blocking switch Q3 as shown in Figure 1.
PGOOD is low when S3#I is LOW.
ENABLE
. Typically tied to S5#. When this pin is low, the IC is in a low quiescent current
state, all regulators are off and S3#O is low.
GROUND
for the IC are tied to this pin and also connected to P1.
Current Limit
. A resistor from this pin to GND sets the current limit.
Soft Start
. A capacitor from this pin to GND programs the slew rate of the converter during
initialization as well as sets the initial slew rate of the LDO controllers when transitioning from
S3 to S0. This pin is charged/discharged with a 5μA current source during initialization, and
charged with 50μA during PWM soft-start.
Output of the PWM error amplifier
. Connect compensation network between this pin and
FB.
VDDQ Feedback
. The feedback from PWM output. Used for regulation as well as PGOOD,
under-voltage, and over-voltage protection and monitoring.
VTT Reference
. Input which provides the reference for the VTT regulator. A precision
internal divider from VDDQ IN is provided.
. Positive supply for the upper MOSFET driver. Connect as shown in Figure 1. IC
9
HDRV
. High-side (upper) MOSFET driver output. Connect to gate of high-side
10
SW
. Return for the high-side MOSFET driver and a current sense input.
11
ISNS
12
LDRV
13
PGOOD
14
VCC
15
16
3.3 ALW
S3#O
17
S3#I
18
EN
19
20
21
GND
ILIM
SS
22
COMP
23
FB
24
REF IN
Pin Definitions
(continued)
Pin #
Pin Name
Pin Function Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FAN5068 | DDR-1/DDR-2 plus ACPI Regulator Combo |
| FAN5068ACPI | FAN5068 Component calculation and simulation tools |
| FAN5068DDR | FAN5068 Component calculation and simulation tools |
| FAN5069MTCX | PWM and LDO Controller Combo |
| FAN5069 | PWM and LDO Controller Combo |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FAN5069 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:PWM and LDO Controller Combo |
| FAN5069_06 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:PWM and LDO Controller Combo |
| FAN5069_08 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:PWM and LDO Controller Combo |
| FAN5069B_BAC3116B WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| FAN5069C_BAD3116B WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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