參數(shù)資料
型號(hào)： FAN5193
廠商： Fairchild Semiconductor Corporation
英文描述： Two Phase Interleaved Synchronous Buck Converter
中文描述： 兩相交錯(cuò)同步降壓轉(zhuǎn)換器
文件頁(yè)數(shù)： 2/21頁(yè)
文件大?。?/td> 524K
代理商： FAN5193
FAN5193
PRODUCT SPECIFICATION
2
REV. 1.0.1 2/4/02
Pin Assignments
Pin Definitions
Pin Number
1-5
Pin Name
VID0-4
Pin Function Description
Voltage Identification Code Inputs.
inputs will program the output voltage over the ranges specified in Table 1.
5V Rail.
Bypass this pin with a 1
μ
F ceramic capacitor to AGND.
Analog Ground.
Return path for low power analog circuitry. This pin should be
connected to a low impedance system ground plane to minimize ground loops.
Low Side FET Driver for B.
Connect this pin to the gate of an N-channel
MOSFET for synchronous operation. The trace from this pin to the MOSFET gate
should be <0.5
"
.
Power Ground B.
Return pin for high currents flowing in low-side MOSFET.
Connect directly to low-side MOSFET source.
High side driver source and low side driver drain switching node B.
drive return for high side MOSFET, and negative input for low-side MOSFET
current sense.
High Side FET Driver B.
Connect this pin to the gate of an N-channel MOSFET.
The trace from this pin to the MOSFET gate should be <0.5
Bootstrap B.
Input supply for high-side MOSFET.
Bootstrap A.
Input supply for high-side MOSFET.
High Side FET Driver A.
Connect this pin to the gate of an N-channel MOSFET.
The trace from this pin to the MOSFET gate should be <0.5
High side driver source and low side driver drain switching node A.
drive return for high side MOSFET, and negative input for low-side MOSFET
current sense.
Power Ground A.
Return pin for high currents flowing in low-side MOSFET.
Connect directly to low-side MOSFET source.
Low Side FET Driver for A.
Connect this pin to the gate of an N-channel
MOSFET for synchronous operation. The trace from this pin to the MOSFET gate
should be <0.5
"
.
VCC.
Internal IC supply. Connect to system 12V supply, and decouple with a
0.1
μ
F ceramic capacitor.
Power Good Flag.
An open collector output that will be logic LOW if the output
voltage is not within +10/-15% of the nominal output voltage setpoint.
Current Limit.
A resistor from this pin to ground sets the over current trip level.
These open collector/TTL compatible
6
7
BYPASS
AGND
8
LDRVB
9
PGNDB
10
SWB
Gate
11
HDRVB
"
.
12
13
14
BOOTB
BOOTA
HDRVA
"
.
15
SWA
Gate
16
PGNDA
17
LDRVA
18
VCC
19
PWRGD
20
ILIM
FAN5093
VID0
VID1
VID2
VID3
VID4
AGND
LDRVB
PGNDB
SWB
HDRVB
BOOTB
BYPASS
VFB
RT
ENABLE/SS
DROOP/E*
ILIM
PWRGD
VCC
LDRVA
PGNDA
SWA
HDRVA
BOOTA
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
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