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參數(shù)資料
| 型號： | FDG8850NZ |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 小信號晶體管 |
| 英文描述： | Dual N-Channel PowerTrench㈢ MOSFET |
| 中文描述： | 750 mA, 30 V, 2 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| 封裝： | ROHS COMPLIANT, SC-70, 6 PIN |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 329K |
| 代理商： | FDG8850NZ |
tm
April 2007
F
M
2007 Fairchild Semiconductor Corporation
FDG8850NZ Rev.B
www.fairchildsemi.com
1
FDG8850NZ
Dual N-Channel PowerTrench
MOSFET
30V,0.75A,0.4
Ω
Features
Max r
DS(on)
= 0.4
Ω
at V
GS
= 4.5V, I
D
= 0.75A
Max r
DS(on)
= 0.5
Ω
at V
GS
= 2.7V, I
D
= 0.67A
Very low level gate drive requirements allowing operation
in 3V circuits(V
GS(th)
<1.5V)
Very small package outline SC70-6
RoHS Compliant
General Description
This dual N-Channel logic level enhancement mode field effect
transistors are produced using Fairchild’s proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance. This device
has been designed especially for low voltage applications as
a replacement for bipolar digital transistors and small signal
MOSFETs. Since bias resistors are not required, this dual digital
FET can replace several different digital transistors, with differ-
ent bias resistor values.
MOSFET Maximum Ratings
T
A
= 25°C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol
V
DS
V
GS
Parameter
Ratings
30
±12
0.75
2.2
0.36
0.30
–55 to +150
Units
V
V
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
I
D
A
P
D
Power Dissipation for Single Operation (Note 1a)
(Note 1b)
W
T
J
, T
STG
Operating and Storage Junction Temperature Range
°
C
R
θ
JA
R
θ
JA
Thermal Resistance, Junction to Ambient Single operation (Note 1a)
350
°C/W
Thermal Resistance, Junction to Ambient Single operation (Note 1b)
415
Device Marking
.50
Device
FDG8850NZ
Reel Size
7”
Tape Width
8mm
Quantity
3000 units
S1
G1
D2
D1
G2
S2
S1
S2
G2
D1
D2
G1
Pin 1
SC70-6
Q1
Q2
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