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參數(shù)資料
| 型號： | FDG901 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Slew Rate Control Driver IC for P-Channel MOSFETs |
| 中文描述： | 轉(zhuǎn)換率控制驅(qū)動集成電路的P通道MOSFET |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 205K |
| 代理商： | FDG901 |
FDG901D rev. D (W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ Max Units
Logic Levels
V
IH
Logic HIGH Input Voltage
V
DD
= 2.70V to 6.0 V
75%
of V
DD
V
V
IL
Logic LOW Input Voltage
V
DD
= 2.70V to 6.0 V
25%
of V
DD
V
OFF Characteristics
BV
IN
Logic Input Breakdown Voltage
BV
SLEW
Slew Input Breakdown Voltage
BV
DG
Supply Input Breakdown Voltage
LOGIC Input Leakage Current
I
RSLEW
SLEW Input Leakage Current
I
RDG
Supply Input Leakage Current
I
IN
= 10
μ
A, V
SLEW
= 0 V
I
SLEW
= 10
μ
A, V
IN
= 0 V
I
DG
= 10
μ
A, V
IN
= 0 V, V
SLEW
= 0 V
V
IN
= 8 V, V
SLEW
= 0 V
V
SLEW
= 8 V, V
IN
= 0 V
V
DG
= 8 V, V
IN
= 0 V, V
SLEW
= 0 V
9
9
9
V
V
V
nA
nA
nA
I
RIN
100
100
100
ON Characteristics
I
G
Gate Current
SLEW = OPEN
SLEW = GND
SLEW = V
DD
90
1
10
120
10
50
μA
μA
nA
V
IN
= 6V
V
GATE
= 2V
Switching Characteristics
t
don
Output Turn-On Delay Time
Slew Pin = OPEN
t
don
Output Turn-On Delay Time
Slew Pin = GROUND
t
don
Output Turn-On Delay Time
Slew Pin = VDD
t
rise
Output Rise Time
Slew Pin = OPEN
t
rise
Output Rise Time
Slew Pin = GROUND
t
rise
Output Rise Time
Slew Pin = VDD
dv/dt
Output Slew Rate
Slew Pin = OPEN
dv/dt
Output Slew Rate
Slew Pin = GROUND
dv/dt
Output Slew Rate
Slew Pin = VDD
8.3
μs
0.6
ms
V
Supply
= 5.5 V, V
DD
= 5.5 V,
Logic IN = 5.5 V,
C
LOAD
= 510 pF, Test Circuit
2.2
ms
28
μs
1.8
ms
V
Supply
= 5.5 V, V
DD
= 5.5 V,
Logic IN = 5.5 V,
C
LOAD
= 510 pF, Test Circuit
11
ms
162
V/ms
2.6
V/ms
V
Supply
= 5.5 V, V
DD
= 5.5 V,
Logic IN = 5.5 V,
C
LOAD
= 510 pF, Test Circuit
0.3
V/ms
Notes:
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface
of the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
F
LOGIC IN
VDD
SLEW
V
SUPPLY
C
Load
Test Circuit
1
2
4
3
5
tdon
trise
10%
10%
90%
LOGIC IN
(Inverted)
Switching Waveforms
OUTPUT
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| FDG901D | 功能描述:開關變換器、穩(wěn)壓器與控制器 Control Driver IC P-Ch Slew Rate RoHS:否 制造商:Texas Instruments 輸出電壓:1.2 V to 10 V 輸出電流:300 mA 輸出功率: 輸入電壓:3 V to 17 V 開關頻率:1 MHz 工作溫度范圍: 安裝風格:SMD/SMT 封裝 / 箱體:WSON-8 封裝:Reel |
| FDG901D_Q | 功能描述:電源開關 IC - 配電 Control Driver IC P-Ch Slew Rate RoHS:否 制造商:Exar 輸出端數(shù)量:1 開啟電阻（最大值）:85 mOhms 開啟時間（最大值）:400 us 關閉時間（最大值）:20 us 工作電源電壓:3.2 V to 6.5 V 電源電流（最大值）: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOT-23-5 |
| FDG910D | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| FDG-E1-D01-0S | 制造商:Fraen Corporation 功能描述:FDG Series Lenses For OSRAM Golden Dragontm LEDs |
| FDG-E1-D01-HS | 制造商:Fraen Corporation 功能描述:FDG Series Lenses For OSRAM Golden Dragontm LEDs |
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