參數(shù)資料
型號(hào): FIN1532MTC
廠商: Fairchild Semiconductor
文件頁數(shù): 1/6頁
文件大?。?/td> 0K
描述: IC RCVR QUAD 5V HS LVDS 16TSSOP
產(chǎn)品變化通告: Product Discontinuation 14/Mar/2011
標(biāo)準(zhǔn)包裝: 94
類型: 接收器
驅(qū)動(dòng)器/接收器數(shù): 0/4
規(guī)程: LVDS
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
2001 Fairchild Semiconductor Corporation
DS500504
www.fairchildsemi.com
December 2001
Revised December 2001
FI
N1532
5V
L
V
DS
4-Bi
tHigh
Speed
D
if
fer
enti
al
Recei
ver
FIN1532
5V LVDS 4-Bit High Speed Differential Receiver
General Description
This quad receiver is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology. The receiver translates LVDS levels, with a typ-
ical differential input threshold of 100 mV, to LVTTL signal
levels. LVDS provides low EMI at ultra low power dissipa-
tion even at high frequencies. This device is ideal for high
speed transfer of clock and data.
The FIN1532 can be paired with its companion driver, the
FIN1531, or any other LVDS driver.
Features
s Greater than 400Mbs data rate
s 5V power supply operation
s 0.5 ns maximum differential pulse skew
s 3 ns maximum propagation delay
s Low power dissipation
s Power-Off protection for inputs and outputs
s Fail safe protection for open-circuit, shorted and termi-
nated receiver inputs
s Meets or exceeds the TIA/EIA-644 LVDS standard
s Pin compatible with equivalent RS-422
and PECL devices
s 16-Lead SOIC and TSSOP packages save space
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pin Descriptions
Function Table
H
= HIGH Logic Level
L
= LOW Logic Level
X
= Don’t Care
Z
= High Impedance
Fail Safe
= Open, Shorted, Terminated
Connection Diagram
Top View
Order Number
Package Number
Package Description
FIN1532M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
FIN1532MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Name
Description
ROUT1, ROUT2, ROUT3, ROUT4 LVTTL Data Outputs
RIN1+, RIN2+, RIN3+, RIN4+
Non-inverting LVDS Inputs
RIN1, RIN2, RIN3, RIN4
Inverting LVDS Inputs
EN
Driver Enable Pin
EN
Inverting Driver Enable Pin
VCC
Power Supply
GND
Ground
Input
Outputs
EN
RIN+
ROUT
HXH
L
H
HX
L
H
L
H
X
Fail Safe Condition
H
XL
H
L
H
XL
L
H
L
X
L
Fail Safe Condition
H
LH
X
Z
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