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參數(shù)資料
| 型號： | FIR Filters |
| 廠商： | Altera Corporation |
| 英文描述： | FIR Compiler(有限的脈沖響應濾波器) |
| 中文描述： | 飛行編譯器（有限的脈沖響應濾波器） |
| 文件頁數(shù)： | 8/19頁 |
| 文件大?。?/td> | 323K |
| 代理商： | FIR FILTERS |
Altera Corporation
8
fir_08tp, fir_16tp, fir_24tp, fir_32tp & fir_64tp
Parallel FIR Filters
Features
I
I
I
I
I
Parallel FIR filter reference designs
High-speed operation: > 100 MSPS
Parameterized data widths, pipelining, and symmetry
Symmetrical or antisymmetrical coefficients
Parallel design versions for maximum performance
General
Description
Altera parallel FIR filters are linear-phase designs with operation speeds
of over 100 MSPS. By efficiently using the Altera FLEX architecture, these
filters provide extremely fast, flexible, and cost-effective design solutions.
The coefficients are stored in LUTs and their values are determined at
compilation; however, the coefficients can be changed by reconfiguring
the device.
Figure 5
shows the symbol for the 8-tap parallel FIR filter. All other
parallel FIR filters in the Altera DSP Design Kit have the same symbol.
Coefficients are defined in an Include File (
.inc
) called
coef.inc
.
Figure 5. 8-Tap Parallel FIR Filter Symbol
Function Prototype
The AHDL Function Prototype for the
below and is the same for all other parallel FIR filters in the Altera DSP
Design Kit:
fir_08tp
function is shown
FUNCTION
WITH (width
,
rom_p
,
internal_p
,
output_p
,
pipelined)
RETURNS (y[output_p..1])
;
fir_08tp (xin[width..1] clk,
aclr)
FIR_08TP
Y[OUTPUT_P..1]
ROM_P =
WIDTH =
CLK
ACLR
XIN[WIDTH..1]
OUTPUT_P =
PIPELINED =
INTERNAL_P =
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