參數(shù)資料
型號(hào): FM25640-S
廠商: Electronic Theatre Controls, Inc.
英文描述: LOW PROFILE .025 SQ STRIPS
中文描述: 64Kb的FRAM的串行存儲(chǔ)器
文件頁數(shù): 8/14頁
文件大?。?/td> 131K
代理商: FM25640-S
FM25640
Rev. 2.1
Aug 2003
8 of 14
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op-code
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13-bit Address
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Figure 9. Memory Write
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op-code
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13-bit Address
12 11 10
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Figure 10. Memory Read
Endurance
Internally, a FRAM operates with a read and restore
mechanism similar to a DRAM. Therefore,
endurance cycles are applied for each access: read or
write. The FRAM architecture is based on an array of
rows and columns. Each access causes a cycle for an
entire row. Therefore, data locations targeted for
substantially differing numbers of cycles should not
be located within the same row. In the FM25640,
there are 2048 rows each 32 bits wide. Each 4 bytes
in the address mark the beginning of a new row.
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