- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382961 > FM25640 (Electronic Theatre Controls, Inc.) TERM STRIP, TH, LO PRO PDF資料下載
參數(shù)資料
| 型號(hào)： | FM25640 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | TERM STRIP, TH, LO PRO |
| 中文描述： | 64Kb的FRAM的串行存儲(chǔ)器 |
| 文件頁數(shù)： | 5/14頁 |
| 文件大小： | 131K |
| 代理商： | FM25640 |
Ramtron
FM25640
Rev. 2.1
Aug 2003
5 of 14
Data Transfer
All data transfers to and from the FM25640 occur in
8-bit groups. They are synchronized to the clock
signal (SCK) and they transfer most significant bit
(MSB) first. Serial inputs are clocked in on the rising
edge of SCK. Outputs are driven on the falling edge
of SCK.
Command Structure
There are six commands called op-codes that can be
issued by the bus master to the FM25640. They are
listed in the table below. These op-codes control the
functions performed by the memory. They can be
divided into three categories. First, are commands
that have no subsequent operations. They perform a
single function such as to enable a write operation.
Second are commands followed by one byte, either in
or out. They operate on the status register. Last are
commands for memory transactions followed by
address and one or more bytes of data.
Table 1. Op-code Commands
Name
Description
WREN
Set Write Enable Latch
00000110b
WRDI
Write Disable
RDSR
Read Status Register
WRSR
Write Status Register
READ
Read Memory Data
WRITE
Write Memory Data
Op-code value
00000100b
00000101b
00000001b
00000011b
00000010b
WREN - Set Write Enable Latch
The FM25640 will power up with writes disabled.
The WREN command must be issued prior to any
write operation. Sending the WREN op-code will
allow the user to issue subsequent op-codes for
write operations. These include writing the status
register and writing the memory.
Sending the WREN op-code causes the internal
Write Enable Latch to be set. A flag bit in the status
register, called WEL, indicates the state of the latch.
WEL=1 indicates that writes are permitted.
Attempting to write the WEL bit in the status
register has no effect. Completing any write
operation will automatically clear the write-enable
latch and prevent further writes without another
WREN command. Figure 4 below illustrates the
WREN command bus configuration.
WRDI - Write Disable
The WRDI command disables all write activity by
clearing the Write Enable Latch. The user can verify
that writes are disabled by reading the WEL bit in
the status register and verifying that WEL=0. Figure
5 below illustrates the WRDI command bus
configuration.
Figure 5. WREN Bus Configuration
Figure 6. WRDI Bus Configuration
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FM25640-S | LOW PROFILE .025 SQ STRIPS |
| FM25CL04 | 4Kb FRAM Serial 3V Memory |
| FM25CL04-S | 4Kb FRAM Serial 3V Memory |
| FM25CL64 | 4Kb FRAM Serial 3V Memory |
| FM25CL64-S | 4Kb FRAM Serial 3V Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FM25640_05 | 制造商:RAMTRON 制造商全稱:RAMTRON 功能描述:64Kb FRAM Serial Memory |
| FM25640_07 | 制造商:RAMTRON 制造商全稱:RAMTRON 功能描述:64Kb FRAM Serial Memory |
| FM25640B | 制造商:RAMTRON 制造商全稱:RAMTRON 功能描述:64Kb Serial 5V F-RAM Memory |
| FM25640B_13 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:64Kb Serial 5V F-RAM Memory |
| FM25640B-G | 功能描述:F-RAM 64Kb Serial SPI 5V FRAM RoHS:否 存儲(chǔ)容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。