參數(shù)資料
型號： FM25C020UE
廠商： Fairchild Semiconductor Corporation
英文描述： LOW PROFILE .025 SQ STRIPS
中文描述： 的2K位SPI⑩的CMOS EEPROM的串行接口
文件頁數(shù)： 4/11頁
文件大?。?/td> 105K
代理商： FM25C020UE
4
www.fairchildsemi.com
FM25C020U Rev. B
F
Low Voltage 2.7V
≤
V
CC
≤
4.5V Specifications
Absolute Maximum Ratings
(Note 5)
Ambient Storage Temperature
All Input or Output Voltage with
Respect to Ground
Lead Temp. (Soldering, 10 sec.)
ESD Rating
DC and AC Electrical Characteristics
2.7V
≤
V
CC
≤
4.5V (unless otherwise specified)
-65
°
C to +150
°
C
+6.5V to -0.3V
+300
°
C
2000V
Operating Conditions
Ambient Operating Temperature
FM25C020UL/LZ
FM25C020ULE/LZE
FM25C020ULV
0
°
C to +70
°
C
-40
°
C to +85
°
C
-40
°
C to +125
°
C
Power Supply (V
CC
)
2.7V
–
4.5V
25C020UL/LE
25C020ULZ/ZE
Min.
25C020ULV
Symbol
I
CC
I
CCSB
Parameter
Operating Current
Standby Current
Part
Conditions
/CS = V
IL
/CS = V
CC
Max.
3
10
1
Min
Max
3
10
N/A
Units
mA
μ
A
μ
A
μ
A
μ
A
V
L
LZ
I
IL
I
OL
V
IL
V
IH
V
OL
V
OH
f
OP
t
RI
t
FI
t
CLH
t
CLL
t
CSH
t
CSS
t
DIS
t
HDS
t
CSN
t
DIN
t
HDN
t
PD
t
DH
t
LZ
t
DF
t
HZ
t
WP
Input Leakage
V
IN
= 0 to V
CC
V
OUT
= GND to V
CC
-1
1
-1
1
Output Leakage
-1
1
-1
1
Input Low Voltage
-0.3
V
CC
* 0.3
V
CC
+ 0.3
0.4
-0.3
V
CC
* 0.3
V
CC
+ 0.3
0.4
Input High Voltage
V
CC
* 0.7
V
CC
* 0.7
V
Output Low Voltage
I
OL
= 0.8 mA
I
OH
=
–
0.8 mA
V
Output High Voltage
V
CC
- 0.8
V
CC
- 0.8
V
SCK Frequency
1.0
1.0
MHz
μ
s
μ
s
ns
Input Rise Time
2.0
2.0
Input Fall Time
2.0
2.0
Clock High Time
(Note 6)
410
410
Clock Low Time
(Note 6)
410
410
ns
Min. /CS High Time
(Note 7)
500
500
ns
/CS Setup Time
500
500
ns
Data Setup Time
100
100
ns
/HOLD Setup Time
240
240
ns
/CS Hold Time
500
500
ns
Data Hold Time
100
100
ns
/HOLD Hold Time
240
240
ns
Output Delay
C
L
= 200 pF
500
500
ns
Output Hold Time
0
0
ns
/HOLD Output Low Z
240
240
ns
Output Disable Time
C
L
= 200 pF
500
500
ns
/HOLD to Output Hi Z
240
240
ns
Write Cycle Time
1-16 Bytes
15
15
ms
Capacitance
T
A
= 25
°
C, f = 2.1/1 MHz (Note 8)
Symbol
Test
Typ Max Units
C
OUT
Output Capacitance
3
8
pF
C
IN
Input Capacitance
2
6
pF
AC Test Conditions
Output Load
C
L
= 200pF
Input Pulse Levels
0.1 * V
CC
- 0.9 * V
CC
Timing Measurement Reference Level
0.3 * V
CC
- 0.7 * V
CC
Note 5:
Stress above those listed under
“
Absolute Maximum Ratings
”
may cause permanent damage to the device. This is a stress rating only, and functional operation of the device
at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
Note 6:
The f
OP
frequency specification specifies a minimum clock period of 1/f
. Therefore, for every f
clock cycle, t
+ t
must be equal to or greater than 1/f
OP
. For
example, for a f
OP
of 1MHz, the period equals 1000ns. In this case if t
CLH
= is set to 410ns, then t
CLL
must be set to a minimum of 590ns.
Note 7:
/CS must be brought high for a minimum of t
CSH
between consecutive instruction cycles.
Note 8:
This parameter is periodically sampled and not 100% tested.
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