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參數(shù)資料
| 型號(hào)： | FM25L16-G |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | DRAM |
| 英文描述： | 4Kb FRAM Serial 3V Memory |
| 中文描述： | 4Kb的鐵電串行3V的記憶 |
| 文件頁(yè)數(shù)： | 6/14頁(yè) |
| 文件大?。?/td> | 149K |
| 代理商： | FM25L16-G |
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FM25L16
Rev. 2.0
Mar. 2005
Page 6 of 14
RDSR - Read Status Register
The RDSR command allows the bus master to verify
the contents of the Status register. Reading Status
provides information about the current state of the
write protection features. Following the RDSR op-
code, the FM25L16 will return one byte with the
contents of the Status register. The Status register is
described in detail in a later section.
WRSR – Write Status Register
The WRSR command allows the user to select
certain write protection features by writing a byte to
the Status register. Prior to issuing a WRSR
command, the /WP pin must be high or inactive.
Note that on the FM25L16, /WP only prevents
writing to the Status register, not the memory array.
Prior to sending the WRSR command, the user must
send a WREN command to enable writes. Note that
executing a WRSR command is a write operation
and therefore clears the Write Enable Latch. The bus
configuration of RDSR and WRSR are shown
below.
Figure 7. RDSR Bus Configuration
Figure 8. WRSR Bus Configuration
Status Register & Write Protection
The write protection features of the FM25L16 are
multi-tiered. First, a WREN op-code must be issued
prior to any write operation. Assuming that writes are
enabled using WREN, writes to memory are
controlled by the Status register. As described above,
writes to the status register are performed using the
WRSR command and subject to the /WP pin. The
Status register is organized as follows.
Table 2. Status Register
Bit
7
6
5
Name
WPEN
0
0
Bits 0 and 4-6 are fixed at 0 and cannot be modified.
Note that bit 0 (Ready in EEPROMs) is unnecessary
as the FRAM writes in real-time and is never busy.
The WPEN, BP1 and BP0 control write protection
4
0
3
2
1
0
0
BP1
BP0
WEL
features. They are nonvolatile (shaded yellow). The
WEL flag indicates the state of the Write Enable
Latch. Attempting to directly write the WEL bit in
the status register has no effect on its state. This bit
is internally set and cleared via the WREN and
WRDI commands, respectively.
BP1 and BP0 are memory block write protection
bits. They specify portions of memory that are write
protected as shown in the following table.
Table 3. Block Memory Write Protection
BP1
BP0
Protected Address Range
0
0
None
0
1
600h to 7FFh (upper )
1
0
400h to 7FFh (upper )
1
1
000h to 7FFh (all)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FM25L16-GA | 功能描述:F-RAM 16K (2Kx8) 2.7V Grade 3 AEC-Q100 RoHS:否 存儲(chǔ)容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
| FM25L16-GATR | 功能描述:F-RAM 16K (2Kx8) 2.7V Grade 3 AEC-Q100 RoHS:否 存儲(chǔ)容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
| FM25L16-GTR | 功能描述:F-RAM 16K (2Kx8) 2.7V RoHS:否 存儲(chǔ)容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
| FM25L256 | 制造商:RAMTRON 制造商全稱:RAMTRON 功能描述:256Kb FRAM Serial 3V Memory - Extended Temp |
| FM25L256B | 制造商:RAMTRON 制造商全稱:RAMTRON 功能描述:256Kb FRAM Serial 3V Memory |
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