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參數(shù)資料
| 型號： | FM93C56A |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 2K-Bit Serial CMOS EEPROM(2KB的串行CMOS EEPROM) |
| 中文描述： | 的2K位串行CMOS EEPROM的（2KB的的串行EEPROM中的CMOS） |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 118K |
| 代理商： | FM93C56A |
7
www.fairchildsemi.com
FM93C56A Rev. C.1
F
(
T
5) Write Disable (WDS)
Write Disable (WDS) instruction disables all programming opera-
tions and should follow all programming operations. Executing
this instruction after a valid write instruction would protect against
accidental data disturb due to spurious noise, glitches, inadvert-
ent writes etc. Input information (Start bit, Opcode and Address)
for this WDS instruction should be issued as listed under Table 1
or Table 2. The device becomes write-disabled at the end of this
cycle when the CS signal is brought low. Execution of a READ
instruction is independent of WDS instruction. Refer Write Disable
cycle diagram.
6) Erase (ERASE)
The ERASE instruction will program all bits in the specified
location to logical
“
1
”
state. Input information (Start bit, Opcode
and Address) for this WDS instruction should be issued as listed
under Table 1 or Table 2. After inputting the last bit of data (A0 bit),
CS signal must be brought low before the next rising edge of the
SK clock. This falling edge of the CS initiates the self-timed
programming cycle. It takes t
time (Refer appropriate DC and
AC Electrical Characteristics table) for the internal programming
cycle to finish. During this time, the device remains busy and is not
ready for another instruction. Status of the internal programming
can be polled as described under WRITE instruction description.
While the device is busy, it is recommended that no new instruc-
tion be issued. Refer Erase cycle diagram.
7) Erase All (ERAL)
The Erase all instruction will program all locations to logical
“
1
”
state. Input information (Start bit, Opcode and Address) for this
WDS instruction should be issued as listed under Table 1 or Table
2. After inputting the last bit of data (A0 bit), CS signal must be
brought low before the next rising edge of the SK clock. This falling
edge of the CS initiates the self-timed programming cycle. It takes
t
time (Refer appropriate DC and AC Electrical Characteristics
table) for the internal programming cycle to finish. During this time,
the device remains busy and is not ready for another instruction.
Status of the internal programming can be polled as described
under WRITE instruction description. While the device is busy, it
is recommended that no new instruction be issued. Refer Erase
All cycle diagram.
Note:
The Fairchild CMOS EEPROMs do not require an
“
ERASE
”
or
“
ERASE ALL
”
instruction prior to the
“
WRITE
”
or
“
WRITE ALL
”
instruction, respectively. The
“
ERASE
”
and
“
ERASE ALL
”
instructions are included to maintain compatibility with
earlier technology EEPROMs.
Clearing of Ready/Busy status
When programming is in progress, the Data-Out pin will display
the programming status as either BUSY (low) or READY (high)
when CS is brought high (DO output will be tri-stated when CS is
low). To restate, during programming, the CS pin may be brought
high and low any number of times to view the programming status
without affecting the programming operation. Once programming
is completed (Output in READY state), the output is
‘
cleared
’
(returned to normal tri-state condition) by clocking in a Start Bit.
After the Start Bit is clocked in, the output will return to a tri-stated
condition. When clocked in, this Start Bit can be the first bit in a
command string, or CS can be brought low again to reset all
internal circuits. Refer Clearing Ready Statusdiagram.
Related Document
Application Note: AN758 - Using Fairchild
’
s MICROWIRE
EE-
PROM.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FM93C56AV | 2K-Bit Serial CMOS EEPROM (MICROWIRE⑩ Synchronous Bus) |
| FM93C66A | 4K-Bit Serial CMOS EEPROM(4KB的串行CMOS EEPROM) |
| FM93C66AE | 4K-Bit Serial CMOS EEPROM (MICROWIRE⑩ Synchronous Bus) |
| FM93C66AV | 4K-Bit Serial CMOS EEPROM (MICROWIRE⑩ Synchronous Bus) |
| FM93C66 | 4096-Bit Serial CMOS EEPROM(4096位的串行CMOS EEPROM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FM93C56AE | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:2K-Bit Serial CMOS EEPROM (MICROWIRE⑩ Synchronous Bus) |
| FM93C56AEM8 | 功能描述:電可擦除可編程只讀存儲器 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| FM93C56AEM8X | 功能描述:電可擦除可編程只讀存儲器 SOIC-8 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| FM93C56AEMT8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microwire Serial EEPROM |
| FM93C56AEN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microwire Serial EEPROM |
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