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參數(shù)資料
| 型號： | FMS3115 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Triple Video D/A Converters 3 x 10 bit, 150 Ms/s |
| 中文描述： | 三路視頻D / A轉(zhuǎn)換3 × 10位，150 MS / s的 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 486K |
| 代理商： | FMS3115 |
DATA SHEET
FMS3110/3115
REV. 1.07 12/8/04
9
Applications Discussion
Figure 5 illustrates a typical FMS3110/3115 interface cir-
cuit. In this example, an optional 1.2 Volt bandgap reference
is
connected to the V
REF
output, overriding the internal volt-
age reference source.
Grounding
It is important that the FMS3110/3115 power supply is well-
regulated and free of high-frequency noise. Careful power
supply decoupling will ensure the highest quality video sig-
nals at the output of the circuit. The FMS3110/3115 has sep-
arate analog and digital circuits. To keep digital system noise
from the D/A converter, it is recommended that power supply
voltages (V
DD
) come from the system analog power source
and all ground connections (GND) be made to the analog
ground plane. Power supply pins should be individually
decoupled at the pin.
Printed Circuit Board Layout
Designing with high-performance mixed-signal circuits
demands printed circuits with ground planes. Overall system
performance is strongly influenced by the board layout.
Capacitive coupling from digital to analog circuits may
result in poor D/A conversion. Consider the following sug-
gestions when doing the layout:
1.
Keep the critical analog traces (V
REF
, I
REF
, COMP,
IO
S
, IO
R
, IO
G
) as short as possible and as far as possi-
ble from all digital signals. The FMS3110/3115 should
be located near the board edge, close to the analog out-
put connectors.
2.
Power plane for the FMS3110/3115 should be separate
from that which supplies the digital circuitry. A single
power plane
should be used for all of the V
DD
pins. If
the power supply for the FMS3110/3115 is the same as
that of the system's
digital circuitry, power to the FMS3110/3115 should be
decoupled with 0.1μF and 0.01μF capacitors and iso-
lated with a ferrite bead.
3.
The ground plane should be solid, not cross-hatched.
Connections to the ground plane should have very short
leads.
4.
If the digital power supply has a dedicated power plane
layer, it should not be placed under the FMS3110/3115,
the voltage reference, or the analog outputs. Capacitive
coupling of digital power supply noise from this layer to
the FMS3110/3115 and its related analog circuitry can
have an adverse effect on performance.
5.
CLK should be handled carefully. Jitter and noise on
this clock will degrade performance. Terminate the
clock line carefully to eliminate overshoot and ringing.
Related Products
FMS38XX Triple 8-bit 150 Msps D/A Converters
FMS9884A 3 x 8-bit 140 Ms/s A/D Converter
Figure 5. Typical Interface Circuit
R
9-0
G
9-0
B
9-0
+5V
0.1
μ
F
10
μ
F
VDD
GND
FMS31XX
Triple 10-bit
D/A Converter
CLK
SYNC
BLANK
RED PIXEL
INPUT
GREEN PIXEL
INPUT
BLUE PIXEL
INPUT
CLOCK
SYNC
BLANK
COMP
V
REF
R
REF
+5V
0.1
μ
F
0.1
μ
F
560
3.3k
(not required without
external reference)
LM185-1.2
(Optional)
IO
R
IO
G
IO
B
75
75
75
75
75
75
Z
O
=75
Green w/Sync
Z
O
=75
Red
Blue
Z
O
=75
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