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參數(shù)資料
| 型號(hào)： | FMS6501MSA28X |
| 廠(chǎng)商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類(lèi)： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | 12 Input 9 Output Video Switch Matrix with Input Clamp, Input Bias Circuitry, and Output Drivers |
| 中文描述： | 12-CHANNEL, AUDIO/VIDEO SWITCH, PDSO28 |
| 封裝： | LEAD FREE, SSOP-28 |
| 文件頁(yè)數(shù)： | 9/16頁(yè) |
| 文件大?。?/td> | 166K |
| 代理商： | FMS6501MSA28X |
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www.fairchildsemi.com
FMS6501 Rev. 1A
F
Applications Information
Input Clamp / Bias Circuitry
The FMS6501 can accommodate either AC or DC coupled
inputs.
Internal clamping and bias circuitry are provided to support AC
coupled inputs. These are selectable through the CLMP bits via
the I
2
C compatible interface.
For DC coupled inputs, the device should be programmed to
use the 'bias' input configuration. In this configuration, the input
is internally biased to 625mV through a 100k
resistor. Distor-
tion is optimized with the output levels set between 250mV
above ground and 500mV below the power supply. These con-
straints along with the desired channel gain need to be consid-
ered when configuring the input signal levels for input DC
coupling.
With AC coupled inputs, the FMS6501 uses a simple clamp
rather than a full DC-restore circuit. For video signals with and
without sync, (Y,CV,R,G,B) the lowest voltage at the output pins
will be clamped to approximately 300mV above ground when
the 6dB gain setting is selected.
If
(chroma,Pb,Pr,Cb,Cr) the bias circuit mentioned above can be
used to center them within the input common range. The aver-
age DC value at the output will be approximately 1.27V with a
6dB gain setting. This value will change, depending upon the
selected gain setting.
symmetric
AC
coupled
input
signals
are
used,
The following diagram shows the clamp mode input circuit and
the internally controlled voltage at the input pin for AC coupled
inputs:
Figure 1. Clamp Mode Input Circuit
The following diagram shows the bias mode input circuit and the
internally controlled voltage at the input pin for AC coupled
inputs.
Figure 2. Bias Mode Input Circuit
Output Configuration
The FMS6501 outputs may be either AC or DC coupled. Resis-
tive output loads can be as low as 75
, representing a dual,
doubly terminated video load. High impedance, capacitive loads
up to 20pF can also be driven without loss of signal integrity. For
standard 75
video loads, a 75
matching resistor should be
placed in series to allow for a doubly terminated load. DC cou-
pled outputs should be connected as follows:
Figure 3. DC-Coupled Load Connection
If multiple, low impedance loads are DC coupled, increased
power and thermal issues will need to be addressed. In this
case, the use of a multilayer board with a large ground plane to
help dissipate heat is recommended. If a 2 layer board is used
under these conditions, use of an extended ground plane
directly under the device is recommended. This plane should
extend at least 0.5" beyond the device. Other PC board layout
issues are covered in the Layout Considerations section below.
AC-coupled loads should be configured as follows:
Figure 4. AC-Coupled Load Connection
Thermal issues are significantly reduced with AC coupled out-
puts, alleviating the need for special PC layout requirements.
Gain Setting
Clamp Voltage
Bias Voltage
6dB
300mV
1.27V
7dB
330mV
1.43V
8dB
370mV
1.60V
9dB
420mV
1.80V
FMS6501
Input
Clamp
75
0.1uF
Video source must
be AC-coupled.
Lowest voltage
set to 125mV
FMS6501
Input
Bias
75
0.1uF
Video source must
be AC-coupled.
Average voltage
set to 625mV
75
Amplifier
75
FMS6501
Output
75
FMS6501
Output
Amplifier
220uF
75
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