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        參數(shù)資料
        型號: FS2540-7RD8TB2
        元件分類: 電源模塊
        英文描述: 2-OUTPUT 100 W DC-DC REG PWR SUPPLY MODULE
        封裝: METAL, CASE S02, MODULE
        文件頁數(shù): 6/31頁
        文件大小: 633K
        代理商: FS2540-7RD8TB2
        Cassette Style
        100 Watt DC-DC Converters
        S Series
        Edition 1/01.2000
        14/31
        Table 5: Inhibit data
        Characteristics
        Conditions
        min
        typ
        max
        Unit
        Uinh
        Inhibit input voltage to keep
        Uo = on
        Ui min...Ui max
        –50
        0.8
        V DC
        output voltage
        Uo = off
        TC min...TC max
        2.4
        50
        Iinh
        Inhibit current
        Uinh = 0
        –400
        A
        t r
        Rise time
        30
        ms
        tf
        Fall time
        depending on
        Io
        Fig. 15
        Typical output response as a function of inhibit control
        0
        t
        0
        Inhibit
        1
        0.1
        Uo nom
        Output
        tr
        tf
        05073
        Sense Lines
        (Only for single output units 5.1 V, 12 V, 15 V, 24 V)
        This feature enables for compensation of voltage drops
        across the connector contacts and if necessary, across the
        load lines. If the sense lines are connected at the load
        rather than directly at the connector, the user should en-
        sure that
        Uo max (between Vo1+ and Vo1–) is not exceeded.
        We recommend connecting the sense lines directly at the
        female connector.
        For further information, please refer to:
        Application Notes.
        To ensure correct operation, both sense lines (S+ and S–)
        should be connected to their respective power outputs
        (Vo1+ and Vo1–)and the voltage difference between any
        sense line and its respective power output pin (as meas-
        ured on the connector) should not exceed the following val-
        ues:
        Note: The output terminals Vo1+ and Vo1- must always be
        connected to the load before connecting the sense lines S+
        and S–, otherwise the unit will be damaged.
        Table 6: Maximum Voltage compensation allowed using
        sense lines
        Output
        Total voltage difference
        Voltage difference
        voltage
        between sense lines and
        between
        their respective outputs
        Vo– and S–
        5.1 V
        < 0.5 V
        < 0.25 V
        12 V, 15 V
        < 1.0 V
        < 0.25 V
        If the output voltages are increased above
        Uo nom via R-in-
        put control, option P setting, remote sensing or option T, the
        output currents must be reduced accordingly so that
        Po nom is not exceeded.
        Auxiliary Functions
        i Inhibit for Remote On and Off
        Note: With open i input: Output is disabled (
        Uo = off).
        The outputs of the module may be enabled or disabled by
        means of a logic signal (TTL, CMOS, etc.) applied between
        the inhibit input i and the negative pin of output 1 (Vo1–). In
        systems with several units, this feature can be used, for ex-
        ample, to control the activation sequence of the converters.
        If the inhibit function is not required, connect the inhibit pin
        18 to pin 14 to enable the outputs (active low logic, fail
        safe). For output response refer to:
        Hold-up Time and Out-
        put Response.
        Vi+
        Vi–
        Vo–
        i
        Vo+
        Iinh
        Uinh
        06031
        1.6
        0.8
        0
        –0.8
        –50
        Uinh [V]
        Iinh [mA]
        –30
        0
        –10
        10
        30
        50
        2.0
        1.2
        0.4
        –0.4
        Uinh = 0.8 V
        Uo = on
        Uo = off
        Uinh = 2.4 V
        06032
        Fig. 13
        Definition of Uinh and Iinh.
        Fig. 14
        Typical inhibit current Iinh versus inhibit voltage Uinh
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