參數(shù)資料
型號(hào): FS6054
廠商: Electronic Theatre Controls, Inc.
英文描述: LOW-SKEW CLOCK FANOUT BUFFER ICs
中文描述: 低偏移時(shí)鐘扇出緩沖器集成電路
文件頁(yè)數(shù): 13/19頁(yè)
文件大?。?/td> 386K
代理商: FS6054
XT
April 1999
4.5.99
13
)6)6)6)6
/RZ6NHZ&ORFN)DQRXW%XIIHU,&V
,62
Figure 14: SDRAM_0:17 Clock Output (3.3V Type 4 Clock Buffer)
Low Drive Current (mA)
High Drive Current (mA)
Voltage
(V)
MIN.
TYP.
MAX.
Voltage
(V)
MIN.
TYP.
MAX.
0
0
0
0
0
1
-72
-72
-68
-67
-64
-60
-54
-39
-30
0
-116
-116
-110
-107
-103
-98
-90
-69
-56
-15
0
-198
-198
-188
-184
-177
-170
-157
-126
-107
-46
-23
0
0.4
0.65
0.85
1
1.4
1.5
1.65
1.8
1.95
3.135
3.6
23
35
43
49
61
64
67
70
72
72
34
52
65
74
93
98
103
108
112
112
112
53
83
104
118
152
159
168
177
184
204
204
1.4
1.5
1.65
1.8
2
2.4
2.6
3.135
3.3
3.465
-220
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
20
40
60
80
100
120
140
160
180
200
220
0
0.5
1
1.5
2
2.5
3
3.5
4
2XWSXW9ROWDJH9
2
X
X
P
$
MIN.
TYP.
MAX.
30
50
90
Figure 15: DC Measurement Points
V
IH 3.3
= 2.0V
V
IL 3.3
= 0.8V
V
OL 3.3
= 0.4V
V
OH 3.3
= 2.4V
1.5V
3.3V
(device
interface)
(system
interface)
Figure 16: Clock Skew Measurement Point
t
skw
3.3V
3.3V
1.5V
1.5V
Figure 17: Timing Measurement Points
t
KH
t
r
Duty Cycle
t
KL
τ
KP
2.4V
1.5V
0.4V
t
f
t
PLZ
V
OL
t
PZL
V
OH
V
SS
V
DD
10%
90%
t
PHZ
50%
50%
50%
50%
t
PHZ
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