參數資料
型號: FS6127
廠商: Electronic Theatre Controls, Inc.
英文描述: VCXO CLOCK GENERATOR IC
中文描述: 石英振蕩器時鐘發(fā)生器IC
文件頁數: 2/6頁
文件大?。?/td> 111K
代理商: FS6127
XT
February 1999
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Table 2: Pin Descriptions
Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DI
U
= Input with Internal Pull-Up; DI
D
= Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input,
DO = Digital Output; P = Power/Ground; # = Active Low pin
PIN
TYPE
NAME
DESCRIPTION
1
AI
XIN
VCXO Crystal Feedback
2
P
VDD
Power Supply (+5V)
3
AI
XTUNE
VCXO Tune
4
P
VSS
Ground
5
DO
CLK
Clock Output
6
P
VDD
Power Supply (+5V)
7
P
VSS
Ground
8
AO
XOUT
VCXO Crystal Drive
3.0 Functional Block Description
3.1
The on-chip PLL is a standard frequency- and phase-
locked loop architecture. The PLL multiplies the reference
oscillator to the desired frequency by a ratio of integers.
The frequency multiplication is exact with a zero synthe-
sis error.
Phase-Locked Loop (PLL)
3.2
Voltage-Controlled Crystal
Oscillator (VCXO)
The VCXO provides a tunable, low-jitter frequency refer-
ence for the rest of the FS6127 system components.
Loading capacitance for the crystal is internal to the
FS6127. No external components (other than the crystal
resonator itself) are required for operation of the VCXO.
Continuous fine-tuning of the VCXO frequency is accom-
plished by varying the voltage on the XTUNE pin. The
total change (from one extreme to the other) in effective
loading capacitance is t.b.d. nominal.
The oscillator operates the crystal resonator in the paral-
lel-resonant mode. Crystal warping, or the “pulling” of the
crystal oscillation frequency, is accomplished by altering
the effective load capacitance presented to the crystal by
the oscillator circuit. The actual amount that changing the
load capacitance alters the oscillator frequency will be
dependent on the characteristics of the crystal as well as
the oscillator circuit itself.
Specifically, the motional capacitance of the crystal (usu-
ally referred to by crystal manufacturers as C
1
), the static
capacitance of the crystal (C
0
), and the load capacitance
(C
L
) of the oscillator determine the “warping” or “pulling”
capability of the crystal in the oscillator circuit.
A simple formula to obtain the warping capability of a
crystal oscillator is:
×
=
(
+
)
(
) (
×
)
C
C
C
C
C
C
C
×
ppm
f
L
L
L
L
1
0
2
0
6
1
2
1
2
10
+
)
(
×
where C
L1
and C
L2
are the two extremes of the applied
load capacitance.
EXAMPLE: A crystal with the following parameters is
used. With C
1
= 0.02pF, C
0
= 5pF, C
L1
= 10pF, and C
L2
=
22.66pF, the tuning range is
(
(
) (
.
66
22
5
2
×
+
×
)
5
)
ppm
.
.
f
305
10
106
+
10
66
22
02
0
=
×
×
=
.
相關PDF資料
PDF描述
FS6127-01 VCXO CLOCK GENERATOR IC
FS6128-01 PLL Clock Generator IC with VCXO
FS6128-04 PLL CLOCK GENERATOR IC WITH VCXO
FS6128-05 PLL CLOCK GENERATOR IC WITH VCXO
FS6128-06 PLL CLOCK GENERATOR IC WITH VCXO
相關代理商/技術參數
參數描述
FS6127-01 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VCXO CLOCK GENERATOR IC
FS6128-01 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PLL Clock Generator IC with VCXO
FS6128-04 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PLL CLOCK GENERATOR IC WITH VCXO
FS6128-04G-XTD 功能描述:時鐘發(fā)生器及支持產品 VCXO CLOCK 27MHZ OUTPUT RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
FS6128-04G-XTP 功能描述:時鐘發(fā)生器及支持產品 VCXO CLOCK 27MHZ OUTPUT RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56