參數(shù)資料
型號: FSA223MUX
廠商: Fairchild Semiconductor
文件頁數(shù): 7/16頁
文件大小: 0K
描述: MUX DPDT AUDIO/USB2.0 10MSOP
標(biāo)準(zhǔn)包裝: 4,000
功能: 多路復(fù)用器
電路: 1 x DPDT
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 帶卷 (TR)
2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA223 Rev. 1.0.4
15
FSA223
USB2.0
High-Speed
(480Mbps)
and
Audi
o
Switche
s
with
Negative
Signal
Capability
Physical Dimensions (Continued)
A
B
C
SEATING
PLANE
DETAIL A
PIN#1 IDENT
RECOMMENDED
LAND PATTERN
NOTES:
A. PACKAGE DOES NOT FULLY CONFORM TO
JEDEC STANDARD.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
E. DRAWING FILENAME: MKT-UMLP10Arev3.
TOP VIEW
BOTTOM VIEW
0.15 C
0.08 C
0.15 C
2X
SIDE VIEW
0.10 C
0.05
3
6
1
0.10 C A B
0.05 C
0.55 MAX.
10
1.40
1.80
0.40
0.15
0.25
(10X)
0.35
0.45
(9X)
1.70
2.10
0.40
0.663
0.563
(9X)
0.225
(10X)
1
0.152
0.10
0.55
0.45
0.10
DETAIL A
SCALE : 2X
1.85
1.45
0.55
0.40
0.225
(10X)
9X
0.45
PIN#1 IDENT
OPTIONAL MINIMIAL
TOE LAND PATTERN
SCALE : 2X
LEAD
OPTION 1
SCALE : 2X
LEAD
OPTION 2
PACKAGE
EDGE
Figure 28.
10-Lead Quad Ultrathin MLP
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
For tape & reel specifications, please visit, http://www.fairchildsemi.com/products/analog/pdf/umlp10_tr.pdf.
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