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參數(shù)資料
| 型號： | FSA2267AL10X |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH DUAL SPDT 10MICROPAK |
| 產品變化通告： | Die Material, Mold Compound Change 03/Oct/2008 |
| 標準包裝： | 5,000 |
| 功能： | 開關 |
| 電路： | 2 x SPDT |
| 導通狀態(tài)電阻： | 350 毫歐 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 2.3 V ~ 4.3 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-UFQFN |
| 供應商設備封裝： | 10-MicroPak? |
| 包裝： | 帶卷 (TR) |
FSA2267/FSA2267A
0.35
Low-V
olt
a
ge
Dual-SPDT
Analog
Switch
2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2267 / FSA2267A Rev. 1.0.5
4
ESD Protection
ESD Performance of the FSA2267/FSA2267A
FSA2267
?
HBM all pins 7.0kV
?
CDM all pins 1.0kV
FSA2267A
?
HBM all pins 7.5kV
?
CDM all pins 1.0kV
Human Body Model
Figure 5 shows the schematic representation of the
Human Body Model ESD event. Figure 6 is the ideal
waveform representation of the Human Body Model. The
device is tested to JEDEC: JESD22-A114 Human Body
Model.
Charged Device Model
In manufacturing test and handling environments, a
more useful model is the Charged Device Model and the
FSA2267/FSA2267A has a very good ESD immunity to
this model. The device is tested to JEDEC: JESD22-
C101 Charged Device Model.
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment and evaluates the
equipment in its entirety for ESD immunity. Fairchild
Semiconductor has evaluated this device using the
IEC 6100-4-2 representative system model depicted in
Figure 7.
ESD values measured via the IEC 61000-4-2 evaluation
method are influenced by the specific board layout,
board size, and many other factors of the manufacturer’s
product application. Measured system ESD values can-
not be guaranteed by Fairchild Semiconductor to exactly
correlate to a manufacturer’s in-house testing due to
these application environment variables. Fairchild Semi-
conductor has been able to determine that, for ultra-por-
table applications, an enhanced ESD immunity, relative
to the IEC 61000-4-2 specification, can be achieved with
the inclusion of a 100
series resistor in the V
CC supply
path to the analog switch (see Figure 8). Typical
improvements of between 3-6kV of ESD immunity (I/O to
GND) have been measured with the inclusion of the
resistor with the IEC 61000-4-2 representative model.
For more information on ESD testing methodologies,
please refer to:
AN-6019 Fairchild Analog Switch Products ESD Test
Methodology Overview
http://www.fairchildsemi.com/an/AN/AN-6019.pdf.
Additional ESD Test Conditions
For information regarding test methodologies and perfor-
mance levels, please contact Fairchild Semiconductor.
Figure 5. Human Body ESD Test Model
Figure 6. HBM Current Waveform
Figure 7. IEC 61000-4-2 ESD Test Model
Figure 8. ESD Immunity with 100
Resistor
1B0
1B1
2B0
2B1
1A
1S
2A
2S
ESD Event
100
Analog Switch Supply Rail
Ultra-portable Connector
VCC
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