參數(shù)資料
型號(hào): FSA266
廠商: Fairchild Semiconductor Corporation
英文描述: TinyLogic Low Voltage UHS Dual SPST Normally Open Analog Switch or 2-Bit Bus Switch
中文描述: 微型邏輯低電壓超高強(qiáng)雙路SPST模擬開關(guān)常開或2位總線開關(guān)
文件頁(yè)數(shù): 4/10頁(yè)
文件大?。?/td> 202K
代理商: FSA266
www.fairchildsemi.com
4
F
DC Electrical Characteristics
(Continued)
Note 4:
Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
Note 5:
Guaranteed by design.
Note 6:
Flatness is defined as the difference between the minimum and maximum value of ON Resistance over the specified range of conditions.
Note 7:
R
ON
=
R
ON
max
R
ON
min measured at identical V
CC
, temperature and voltage levels.
AC Electrical Characteristics
Note 8:
This parameter is guaranteed by design. The switch contributes no propagation delay other than the RC delay of the On Resistance of the switch
and the 50 pF load capacitance.
Note 9:
Guaranteed by design.
Note 10:
Off Isolation
=
20 log
10
[V
A
/V
Bn
]
Capacitance
Symbol
Parameter
V
CC
(V)
4.5
3.0
T
A
=
+
25
°
C
Typ
2.5
8
T
A
=
40
°
C to
+
85
°
C
Min
Units
Conditions
Min
Max
6
17.5
Max
6
17.5
R
flat
On Resistance Flatness
(Note 4)(Note 5)(Note 6)
I
O
=
30 mA, 0
V
I
V
CC
I
O
=
24 mA, 0
V
I
V
CC
I
O
=
8 mA, 0
V
I
V
CC
I
O
=
4 mA, 0
V
I
V
CC
2.3
1.65
33
135
60
250
60
250
Symbol
Parameter
V
CC
(V)
T
A
=
40
°
C to
+
85
°
C
Min
Typ
0.35
Units
Conditions
Figure
Max
1.0
Number
t
PHL
, t
PLH
Propagation Delay Bus-to-Bus
4.5 to 5.5
ns
(Note 8)
3.0 to 3.6
2.3 to 2.7
1.65 to 1.95
0.7
1.1
2.0
1.5
2.5
4.0
V
I
=
OPEN
C
L
=
50 pF, RU
=
RD
=
500
Figures
2, 1
t
PZL
, t
PZH
Output Enable Time
Turn on Time
4.5 to 5.5
3.0 to 3.6
2.3 to 2.7
0.8
1.2
1.5
2.0
2.5
3.2
3.2
3.9
5.6
ns
V
I
=
0V for t
PZH
V
I
=
2 x V
CC
for t
PZL
C
L
=
50 pF, RU
=
RD
=
500
Figures
2, 1
1.65 to 1.95
4.5 to 5.5
3.0 to 3.6
2.5
0.8
1.5
5.7
2.6
3.4
10
4.1
5.0
t
PLZ
, t
PHZ
Output Disable Time
Turn Off Time
ns
V
I
=
0V for t
PHZ
V
I
=
2 x V
CC
for t
PLZ
C
L
=
50 pF, RU
=
RD
=
500
C
L
=
0.1 nF, V
GEN
=
0V,
R
GEN
=
0
, f
=
1 MHz
R
L
=
50
, C
L
=
5 pF,
f
=
10 MHz
R
L
=
50
, C
L
=
5 pF,
f
=
10 MHz
R
L
=
50
R
L
=
600
0.5 V
P-P
f
=
600 Hz to 20 KHz
Figures
2, 1
2.3 to 2.7
1.65 to 1.95
1.65 to 5.5
2.0
3.0
4.2
6.2
6.9
10.5
Q
Charge Injection (Note 9)
pC
Figure 3
OIRR
Off Isolation (Note 10)
1.65 to 5.5
-55
dB
Figure 4
Xtalk
Crosstalk
1.65 to 5.5
70
dB
Figure 5
BW
3dB Bandwidth
Total Harmonic Distortion
(Note 9)
1.65 to 5.5
>
300
MHz
Figure 8
THD
5
.016
%
Symbol
C
IN
C
I/O
(OFF) Switch Port Off Capacitance
C
I/O
(ON)
Switch Port Capacitance when Switch is Enabled
Parameter
Typ
2.5
5
Max
Units
pF
pF
Conditions
Figures
Control Pin Input Capacitance
V
CC
=
0V
V
CC
=
5.0V
V
CC
=
5.0V
Figure 6
10
pF
Figure 7
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