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參數(shù)資料
| 型號(hào)： | FSL106MR |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.62 A SWITCHING CONTROLLER, 73 kHz SWITCHING FREQ-MAX, PDIP8 |
| 封裝： | ROHS COMPLIANT, MS-001BA, DIP-8 |
| 文件頁(yè)數(shù)： | 3/13頁(yè) |
| 文件大?。?/td> | 932K |
| 代理商： | FSL106MR |
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2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSL106MR Rev. 1.0.2
11
FSL106M
R
—
Green
M
ode
Fairchild
Power
Swit
ch
(
F
PS)
Output-Short Protection (OSP)
If the output is shorted, steep current with extremely
high di/dt can flow through the SenseFET during the
LEB time. Such a steep current brings high-voltage
stress on the drain of SenseFET when turned off. To
protect the device from such an abnormal condition,
OSP is included. It is comprised of detecting VFB and
SenseFET turn-on time. When the VFB is higher than
1.6V and the SenseFET turn-on time is lower than
1.0s, the FPS recognizes this condition as an
abnormal error and shuts down PWM switching until
VCC reaches VSTART again. An abnormal condition
output is shown in Figure 20.
D
MOSFET
Drain
Current
Rectifier
Diode
Current
VFB
VOUT
output short occurs
1.6us
IOUT
ILIM
Turn-off delay
Minimum
turn-on time
Figure 20.Output Short Waveforms (OSP)
Soft-Start
The FPS has an internal soft-start circuit that slowly
increases the feedback voltage, together with the
SenseFET current, after it starts. The typical soft-start
time is 15ms, as shown in Figure 21, where progressive
increments of the SenseFET current are allowed during
the startup phase. The pulse width to the power
switching device is progressively increased to establish
the correct working conditions for transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased with the intention
of smoothly establishing the required output voltage. It
also helps to prevent transformer saturation and reduce
the stress on the secondary diode.
Figure 21. Internal Soft-Start
Burst Operation
To minimize power dissipation in standby mode, the
FPS enters burst mode. As the load decreases, the
feedback voltage decreases. As shown in Figure 22,
the device automatically enters burst mode when the
feedback voltage drops below VBURH. Switching
continues until the feedback voltage drops below VBURL.
At this point, switching stops and the output voltages
start to drop at a rate dependent on the standby current
load. This causes the feedback voltage to rise. Once it
passes VBURH, switching resumes. The feedback
voltage then falls and the process repeats. Burst mode
alternately enables and disables switching of the
SenseFET and reduces switching loss in standby mode.
Figure 22.Burst-Mode Operation
Adjusting Peak Current Limit
As shown in Figure 23, a combined 6k internal
resistance is connected to the non-inverting lead on the
PWM comparator. An external resistance of Rx on the
current limit pin forms a parallel resistance with the 6k
when the internal diodes are biased by the main current
source of 400A. For example, FSL106MR has a typical
SenseFET peak current limit (ILIM) of 0.55A. ILIM can be
adjusted to 0.4A by inserting Rx between the IPK pin and
the ground. The value of the Rx can be estimated by
the following equations:
XkΩ
:
6kΩ
0.4A
:
0.55A
=
(1)
6kΩ
||
Rx
X =
(2)
where X represents the resistance of the parallel
network.
Figure 23. Peak Current Limit Adjustment
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