參數(shù)資料
        型號: FSSD06BQX
        廠商: Fairchild Semiconductor
        文件頁數(shù): 8/14頁
        文件大?。?/td> 0K
        描述: IC MUX SD/SDIO/MMC 2PORT 24-MLP
        標準包裝: 1
        類型: 多路復(fù)用器
        應(yīng)用: 手機,數(shù)碼相機,媒體播放器
        安裝類型: 表面貼裝
        封裝/外殼: 24-MLP
        供應(yīng)商設(shè)備封裝: 24-MLP(5x5)
        包裝: 標準包裝
        產(chǎn)品目錄頁面: 1219 (CN2011-ZH PDF)
        其它名稱: FSSD06BQXDKR
        2007 Fairchild Semiconductor Corporation
        www.fairchildsemi.com
        FSSD06 Rev. 1.0.5
        3
        FSSD06
        SD/SDIO
        and
        MMC
        Two-Port
        Multiplexer
        Typical Application Diagram
        CMD, DAT[3:0]
        5
        1.65 – 3.60V
        WiFi,
        Bluetooth,
        MMC or SD
        Module
        Processor
        VDDH
        GND
        /OE
        S
        1CMD, 1DAT[3:0]
        FSSD06
        Secure Data /
        Multimedia Card
        2:1 Peripheral
        Expander
        CLK
        1CLK
        5
        2CMD, 2DAT[3:0]
        WiFi,
        Bluetooth,
        MMC or SD
        Module
        ,,
        2CLK
        5
        V
        DD H to 3.6V
        VDDC1
        V
        DD H to 3.6V
        VDDC2
        GND
        RT
        GND
        RT
        Note
        : External resistors (R T) are
        recommended if card supplies are
        allowed to float in the application.
        The resistors should be >500K to
        minimize power consumption.
        Figure 4.
        Typical Application Diagram
        Functional Description
        The FSSD06 enables sharing the ASIC/baseband
        processor SDIO port(s) to two peripheral cards,
        providing
        bi-directional
        support
        for
        dual-voltage
        SD/SDIO or MMC cards available in the marketplace.
        Each SDIO port of the FSSD06 has its own supply rail,
        allowing peripheral cards with different supplies to be
        interfaced to the host. The peripheral card supplies must
        be equal or greater than the host to minimize power
        consumption. The independent VDDH, VDDC1, and VDDC2
        are defined by the supplies connected from the
        application Power Management ICs (PMICs) to the
        FSSD06. The clock path is a uni-directional buffered
        path rather than a bi-directional switch port.
        CMD, DAT Bus Pull-ups
        The 1CMD, 2CMD, 1DAT[3:0], and 2DAT[3:0] ports do
        not have, internally, the system pull-up resistors as
        defined in the MMC or SD card system bus
        specifications. The system bus pull-up must be added
        external to the FSSD06. The value, within the specific
        specification limits, is a function of the individual
        application and type of card or peripheral connected. For
        SD card applications, the RCMD and RDAT pull-ups should
        be between 10k and 100k. For MMC applications,
        the RCMD pull-ups should be between 4.7k and 100k
        and the RDAT pull-ups between 50k and 100k. The
        card-side 1CMD, 2CMD, 1DAT[3:0], and 2DAT[3:0]
        outputs have a circuit that facilitates incident wave
        switching, so the external pull-up resistors ensure
        retention of the output high level.
        The /OE pin can be used to place the 1CMD, 2CMD,
        1DAT[3:0] and 2DAT[3:0] into high-impedance mode
        when the system enters IDLE state (see IDLE State
        CMD/DAT Bus “Parking”
        ).
        CLK Bus
        The 1CLK and 2CLK outputs are bi-state buffer
        architectures, rather than a switch I/O, to ensure 52MHz
        incident
        wave
        switching.
        When
        there
        is
        no
        communication on the bus (IDLE), the FSSD06 can be
        disabled with the /OE pin. When this pin is pulled HIGH,
        the nCLK outputs are also pulled HIGH. Along with
        nCMD, nDAT[3:0] goes high-impedance to ensure that
        the CLK path between the FSSD06 and the peripheral
        does not float.
        IDLE State CMD/DAT Bus “Parking”
        The SD and MMC card specifications were written for a
        direct point-to-point communication between host
        controller and card. The introduction of the FSSD06 in
        that path, as an expander, requires that the functional
        operation and system latency not be impacted by the
        FSSD06 switch characteristics. Since there are various
        card formats, protocols, and configurable controllers, a
        /OE pin is available to facilitate a fast IDLE transition for
        the nCMD/nDAT[3:0] outputs. Some controllers, rather
        than simply placing CMD/DAT into high-impedance
        mode, may pull their outputs HIGH for a clock cycle prior
        to going into high-impedance mode (referred to as
        “parking” the output). Some legacy controllers pull their
        outputs HIGH versus high impedance.
        If the /OE pin is left LOW and the controller places the
        CMD/DAT[3:0] outputs into high impedance, the
        nCMD/nDAT[3:0] output rise time is a function of the RC
        time
        constant
        through
        the
        switch
        path.
        It
        is
        recommended that the host controller pull CMD and
        DAT[3:0] HIGH for one cycle before pulling /OE HIGH.
        This facilitates parking all nCMD/nDAT[3:0] outputs
        HIGH before putting the switch I/Os in high impedance.
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