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參數(shù)資料
| 型號： | FST3257QSCX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quad 2:1 Multiplexer/Demultiplexer Bus Switch |
| 中文描述： | CBT/FST/QS/5C/B SERIES, 4 LINE TO 2 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16 |
| 封裝： | 0.150 INCH, GREEN, MO-137, QSOP-16 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 96K |
| 代理商： | FST3257QSCX |
3
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F
AC Electrical Characteristics
Note 6:
This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
(Note 7)
Note 7:
T
A
=
+
25
°
C, f
=
1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note:
Input driven by 50
source terminated in 50
Note:
C
L
includes load and stray capacitance
Note:
Input PRR
=
1.0 MHz, t
W
=
500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
Symbol
Parameter
T
A
=
40
°
C to
+
85
°
C,
C
L
=
50 pF, RU
=
RD
=
500
V
CC
=
4.5 – 5.5V
Min
Max
0.25
1.0
4.7
1.0
5.2
Units
Conditions
Figure No.
V
CC
=
4.0V
Min
Max
0.25
5.2
5.7
t
PHL
,t
PLH
Prop Delay Bus to Bus (Note 6)
Prop Delay, Select to Bus A
t
PZH
, t
PZL
Output Enable Time, Select to Bus B
ns
V
I
=
OPEN
Figure 1
Figure 2
ns
V
I
=
7V for t
PZL
V
I
=
OPEN for t
PZH
V
I
=
7V for t
PLZ
V
I
=
OPEN for t
PHZ
Figure 1
Figure 2
Output Enable Time, OE to Bus A, B
1.0
5.1
5.6
t
PHZ
, t
PLZ
Output Disable Time, Select to Bus B
Output Disable Time, Output Enable Time,
1.0
5.2
5.5
ns
Figure 1
Figure 2
1.5
5.5
5.5
OE to Bus A, B
Symbol
Parameter
Typ
Max
Units
Conditions
C
IN
C
I/O
Control Pin Input Capacitance
3
pF
V
CC
=
5.0V
A Port Input/Output Capacitance
B Port
7
5
pF
pF
V
CC
, OE
=
5.0V
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