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參數(shù)資料
| 型號： | FSTD16211MTDX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH BUS 24BIT TTL 56TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 總線開關(guān) |
| 電路： | 12 x 1:1 |
| 獨(dú)立電路： | 2 |
| 電壓電源： | 單電源 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-TFSOP（0.240"，6.10mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 56-TSSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | FSTD16211MTDXDKR |
2005 Fairchild Semiconductor Corporation
DS500313
www.fairchildsemi.com
June 2000
Revised April 2005
FSTD16
21
1
2
4
-Bi
t
Bus
Swit
ch
w
it
h
Level
Shif
ting
FSTD16211
24-Bit Bus Switch with Level Shifting
General Description
The Fairchild Switch FSTD16211 provides 24-bits of high-
speed CMOS TTL-compatible bus switching. The low On
Resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise. A diode to VCC has been
integrated into the circuit to allow for level shifting between
5V inputs and 3.3V outputs.
The device is organized as a 12-bit or 24-bit bus switch.
When OE1 is LOW, the switch is ON and Port 1A is con-
nected to Port 1B. When OE2 is LOW, Port 2A is connected
to Port 2B. When OE1/2 is HIGH, a high impedance state
exists between the A and B Ports.
Features
s 4
: switch connection between two ports
s Voltage level shifting
s Minimal propagation delay through the switch
s Low lCC
s Zero bounce in flow-through mode
s Control inputs compatible with TTL level
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Ordering Code:
Note 1: Ordering code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Order Number
Package Number
Package Description
FSTD16211G
(Note 1)(Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
FSTD16211MTD
(Note 2)
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
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