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參數(shù)資料
| 型號(hào)： | FSUSB11MTCX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC USB SWITCH DUAL 1X1 14TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | USB 開關(guān) |
| 電路： | 2 x 1:1 |
| 導(dǎo)通狀態(tài)電阻： | 1.5 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 1.65 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | FSUSB11MTCXDKR |
Micrel, Inc.
SY54023AR
June 2008
7
M9999-062608-A
hbwhelp@micrel.com or (408) 955-1690
Interface Applications
For Input Interface Applications, see Figures 4a
through 4f and for CML Output Termination, see
Figure 5a through Figure 5d.
CML Output Termination with VCCO 1.2V
For VCCO of 1.2V, Figure 5a, terminate the output
with 50
-to-1.2V, DC coupled, not 100 differentially
across the outputs.
If AC-coupling is used, Figure 5d, terminate into 50
-
to-1.2V before the coupling capacitor and then
connect to a high value resistor to a reference
voltage.
Do not AC couple with internally terminated receiver.
For example, 50
ANY-IN input. AC-coupling will
offset the output voltage by 200mV and this offset
voltage will be too low for proper driver operation. Any
unused output pair needs to be terminated when
VCCO is 1.2V, do not leave floating.
CML Output Termination with VCCO 1.8V
For VCCO of 1.8V, Figure 5a and Figure 5b,
terminate
with
either
50
-to-1.8V
or
100
differentially across the outputs. AC- or DC-coupling
is fine.
Input AC Coupling
The SY54023AR input can accept AC-coupling from
any driver. Bypass VT with a 0.1F low ESR capacitor
to VCC as shown in Figures 4c and 4d. VT has an
internal high impedance resistor divider as shown in
Figure 2a, to provide a bias voltage for AC-coupling.
Timing Diagrams
Figure 1a. Propagation Delay
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