參數(shù)資料
型號： FVA Series
英文描述： Flash Memory Card 2, 4, 8, 16 MB (Intel/Sharp based )(2, 4, 8, 16 M字節(jié)閃速存儲器卡（基于Intel/Sharp）)
中文描述： 閃存卡2，4，8，16 MB的（英特爾/夏普為基礎(chǔ)）（2，4，8，16米字節(jié)閃速存儲器卡（基于英特爾/夏普））
文件頁數(shù)： 2/13頁
文件大?。?/td> 146K
代理商： FVA SERIES
August 2000 Rev. 3 - ECO #13134
2
PCMCIA Flash Memory Card
FVA Series
PC Card Products
Pin Signal name I/O
1
GND
2
DQ3
3
DQ4
4
DQ5
5
DQ6
6
DQ7
7
CE1#
8
A10
9
OE#
10
A11
11
A9
12
A8
13
A13
14
A14
15
WE#
16
RDY/BSY
#
17
Vcc
18
Vpp1
19
A16
20
A15
21
A12
22
A7
23
A6
24
A5
25
A4
26
A3
27
A2
28
A1
29
A0
30
DQ0
31
DQ1
32
DQ2
33
WP
34
GND
Function
Ground
Data bit 3
Data bit 4
Data bit 5
Data bit 6
Data bit 7
Card enable 1
Address bit 10
Output enable
Address bit 11
Address bit 9
Address bit 8
Address bit 13
Address bit 14
Write Enable
Ready/Busy
Supply Voltage
Prog. Voltage
Address bit 16
Address bit 15
Address bit 12
Address bit 7
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Data bit 0
Data bit 1
Data bit 2
Write Potect
Ground
Active
Pin Signal name I/O
35
GND
36
CD1#
37
DQ11
38
DQ12
39
DQ13
40
DQ14
41
DQ15
42
CE2#
43
VS1
44
RFU
45
RFU
46
A17
47
A18
48
A19
49
A20
50
A21
51
Vcc
52
Vpp2
53
A22
54
A23
55
A24
56
A25
57
VS2
58
RST
59
Wait#
60
RFU
61
REG#
62
BVD2
63
BVD1
64
DQ8
65
DQ9
66
DQ10
67
CD2#
68
GND
Function
Ground
Card Detect 1
Data bit 11
Data bit 12
Data bit 13
Data bit 14
Data bit 15
Card Enable 2
Voltage Sense 1
Reserved
Reserved
Address bit 17
Address bit 18
Address bit 19
Address bit 20
Address bit 21
Supply Voltage
Prog. Voltage
Address bit 22
Address bit 23
Address bit 24
Address bit 25
Voltage Sense 2
Card Reset
O Extended Bus cycle
Reserved
I
Attrib Mem Select
O
Bat. Volt. Detect 2
O
Bat. Volt. Detect 1
I/O
Data bit 8
I/O
Data bit 9
O
Data bit 10
O
Card Detect 2
Ground
Active
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
O
O
I/O
I/O
I/O
I/O
I
I
O
LOW
LOW
LOW
N.C.
LOW
I
I
I
I
I
LOW
LOW
2MB(2)
4MB(2)
N.C.
N.C.
8MB(2)
16MB(2)
N.C.
N.C.
N.C.
HIGH
LOW
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
O
I
N.C.
I/O
I/O
I/O
O
HIGH
LOW
Pinout
Notes:
1. RDY/BSY signal is a full CMOS output, pull-up resistors are not required.
2. Shows density for which specified address bit is MSB. Higher order address bits are no
connects (ie 4MB A21 is MSB A22 - A25 are NC).
Mechanical
54.0mm ± 0.10
(2.126”)
10.0mm MIN
(0.400”)
1.6mm ± 0.05
(0.063”)
1.0mm ± 0.05
(0.039”)
1.0mm ± 0.05
(0.039”)
3.3mm ± T1 (0.130”)
T1=0.10mm interconnect area
T1=0.20mm substrate area
Interconnect area
10.0mm MIN
(0.400”)
3.0mm MIN
85.6mm ± 0.20
(3.370”)
Substrate area
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