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參數資料
| 型號： | FW801 |
| 英文描述： | One-Cable Transceiver/Arbiter Device |
| 中文描述： | 一個電纜收發(fā)器/仲裁器裝置 |
| 文件頁數： | 4/22頁 |
| 文件大?。?/td> | 369K |
| 代理商： | FW801 |
FW801 PHY
IEEE
1394A
One-Cable Transceiver/Arbiter Device
Data Sheet, Rev. 1
June 2001
4
Agere Systems Inc.
Description
(continued)
The signal, C/LKON, as an input, indicates whether a
node is a contender for bus manager. When the
C/LKON signal is asserted, it means the node is a con-
tender for bus manager. When the signal is not
asserted, it means that the node is not a contender.
The C bit corresponds to bit 20 in the self-ID packet
(see Table 4-29 of the
IEEE
1394-1995 standard for
additional details).
The power-class bits of the self-ID packet do not have
a default value. These bits can be initialized and read/
written through the LLC using the PHY Register Map
Figure 6-1 of the
IEEE
P1394a Draft 2.0 standard. See
Table 8 for the address space of the Pwr_class
register.
A powerdown signal (PD) is provided to allow a power-
down mode where most of the PHY circuits are
powered down to conserve energy in battery-powered
applications. A cable status signal, CNA, provides a
high output when none of twisted-pair cable ports are
receiving incoming bias voltage. This output is not
debounced. The CNA output can be used to deter-
mine when to power the PHY down or up. In the
powerdown mode, all circuitry is disabled except the
CNA circuitry. It should be noted that when the device
is powered down, it does not act in a repeater mode.
When the power supply of the PHY is removed while
the twisted-pair cables are connected, the PHY trans-
mitter and receiver circuitry has been designed to
present a high impedance to the cable in order to not
load the TPBIAS signal voltage on the other end of the
cable.
For reliable operation, the TPBn signals must be termi-
nated using the normal termination network regardless
of whether a cable is connected to a port or not con-
nected to a port. When a port does not have a cable
connected, internal connect-detect circuitry will keep
the port in a disconnected state.
Note:
All gap counts on all nodes of a 1394 bus must
be identical. This may be accomplished by using
PHY configuration packets (see Section 4.3.4.3
of
IEEE
1394-1995 standard) or by using two
bus resets, which resets the gap counts to the
maximum level (3Fh).
The link power status (LPS) signal works with the
C/LKON signal to manage the LLC power usage of the
node. The LPS signal indicates that the LLC of the
node is powered up or powered down. If LPS is inac-
tive for more than 1.2
μ
s and less than 25
μ
s, PHY/link
interface is reset. If LPS is inactive for greater than
25
μ
s, the PHY will disable the PHY/link interface to
save power. If the PHY then receives a link-on packet,
the C/LKON signal is activated to output a 6.114 MHz
signal, which can be used by the LLC to power itself
up. Once the LLC is powered up, the LPS signal com-
municates this to the PHY and the PHY/link interface
is enabled. C/LKON signal is turned off when both LPS
is active and Link_active bit (see Table 9) is set.
Two of the signals are used to set up various test con-
ditions used in manufacturing. These signals, SE and
SM, should be connected to V
SS
for normal operation.
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| FW802 | Low-Power PHY IEEE 1394A-2000 Two-Cable Transceiver/Arbiter Device |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| FW801A | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Power PHY IEEE 1394A-2000 One-Cable Transceiver/Arbiter Device |
| FW801A-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Power PHY IEEE 1394A-2000 One-Cable Transceiver/Arbiter Device |
| FW801BF | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Power PHY 1394a-2000 One-Cable Transceiver/Arbiter Device |
| FW801BF-09-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Power PHY 1394a-2000 One-Cable Transceiver/Arbiter Device |
| FW802 | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Power PHY IEEE 1394A-2000 Two-Cable Transceiver/Arbiter Device |
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