參數(shù)資料
型號: G2992_06
廠商: Global Mixed-mode Technology Inc.
英文描述: 3A DDR Bus Termination Regulator
中文描述: 第3A DDR總線終端穩(wěn)壓器
文件頁數(shù): 6/7頁
文件大?。?/td> 336K
代理商: G2992_06
Ver: 1.0
Aug 29, 2006
TEL: 886-3-5788833
http://www.gmt.com.tw
6
G2992
Global Mixed-mode Technology Inc.
Pin Description
PIN
NAME
FUNCTION
1
VIN
Terminator Power pin.
2
GND
Ground
3
VREF
Terminator reference input voltage, 1.25V for DDR I, 0.9V for DDR II. Below 0.2V, the chip
will be shutdown.
4
VOUT
Terminator output pin (VTT voltage supplied)
5,7,8
NC
No Connection
6
VCNTL
Internal circuit power pin, at least 3.3V
Block Diagram
Application Information
Output Capacitor
For stable operation, total capacitance of the VTT out-
put terminal can be equal or greater than 20F. The
output capacitor should be located near VTT output
terminal as close as possible to minimize the effect of
ESR and ESL.
Power on sequence
For safely operation, The G2992 must keep VCNTL
voltage larger than VIN, this condition is due to the in-
ternal parasitic diodes between VIN to VCNTL. The
G2992 will consume large current when VIN voltage is
larger than VCNTL.
Consideration of the VREF Voltage
The VREF voltage is applied by a buffered mid-rail
voltage which is generated by a resistor divider be-
tween VIN and GND. Using a capacitor tapped to the
voltage divider can form a low-pass filter. It can in-
crease both the soft-start interval and the noise immu-
nity.
Input Capacitor
Adding a capacitance close to VIN pin can improve the
VTT performance when fast load- transient. In general,
1/2 COUT is recommended for the VIN capacitance.
Separating the VIN and VCNTL pins will get better tran-
sient performance.
A ceramic capacitance with a value between 1.0F
and 4.7F close to the VCNTL pin is recommended to
stabilize the VCNTL voltage.
+
VIN
VCNTL
VREF
VOUT
Shutdown
GND
+
VIN
VCNTL
VREF
VOUT
Shutdown
GND
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