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參數(shù)資料
| 型號： | G569CS8U |
| 廠商： | Global Mixed-mode Technology Inc. |
| 英文描述： | CD-RW Laser Diode Current Driver |
| 中文描述： | CD - RW激光二極管電流驅(qū)動器 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大小： | 185K |
| 代理商： | G569CS8U |
Ver: 1.0
Oct 02, 2000
TEL: 886-3-5788833
http://www.gmt.com.tw
4
G569C
Global Mixed-mode Technology Inc.
Detail Description
The typical application circuit of G569C is shown in Fig.
1. The block diagram of G569C is shown in Fig. 2. It
contains nine circuit blocks. The operation of these
blocks is described below.
READ Block
This
block
is
equivalent
to
an
operational
transconductance amplifier (OTA). The voltage on
PR_I pin is the input voltage, VPR_I; the output current,
IR, is delivered on pin IR. The relationship between
VPR_I and IR is given by:
IR = 820 x VPR_I /( R232 ∥R233)
where IR is in mA, VPR_I is in volt, and R is in Ω. The
recommended values for R232 and R233 are 22
Ω, the
maximum VPR_I is 2.16 V, thus the maximum IR is
160mA. Since IR must flow through the two external
22
Ω resistors connected between VDD and LS_READ
pin, type 1206 SMD resistors must be used to handle
the power dissipation.
ERASE Block
This block is also equivalent to an operational
transconductance amplifier (OTA). The voltage on
PWD node is the input voltage, VPWD; the output
voltage, VEDB, can be used to drive an external PNP
BJT to provides desired IE current. The relationship
between VPWD and IE is given by:
1800
IE =
R235
x VPWD / RPERASE,
where IE is in mA, VPWD is in volt, and RPERASE, in KΩ,
is the total resistance from pin PEARSE to ground.
Typically, a digital-to-analog converter (DAC) resistor
array is connected at PERASE pin to allow digital
programming of the OTA's transconductance. The
maximum RPERASE is 7.5K
Ω. An internal DAC can
be enabled through I
2S bus to replace the external
DAC resistor array. The maximum IE is 130 mA. Since
IE must flow through the external 6.8
Ω resistors
connected between VDD and LS_ERASE pin, type
1206 SMD resistors must be used to handle the power
dissipation.
WRITE Block
This block is also an operational transconductance
amplifier (OTA). The voltage on PWD node is the input
voltage, VPWD; the output voltage, VWDB, can be used
to drive an external PNP BJT to provides desired IW
current. The relationship between VPWD and IW is
given by:
1800
IW =
R234
x VPWD / RPWRITE,
where IW is in mA, VPWD is in volt, and RPWRITE, in KΩ
is the total resistance from pin PWRITE to ground.
Typically, a digital-to-analog converter (DAC) resistor
array is connected at PWRITE pin to allow digital
programming of the OTA's transconductance. An
internal DAC can be enabled through I
2S bus to
replace the external DAC resistor array. The maximum
RPWRITE is 7.5K
Ω. The maximum IW is 130 mA.
Since IW must flow through the external 6.8
Ω resistors
connected between VDD and LS_WRITE pin, type
1206 SMD resistors must be used to handle the power
dissipation.
DELTAP Block
This block is a current sink used to selectively sink the
IW current. When DP4 is low, the current sink reduces
the output current on IW by the amount of the
magnitude of the current sink. The magnitude of the
current sink, Is, is given by:
3
Is =
20
x VDELTAP / RLS_DELTA,
where Is is in mA; VDELTAP, in volt, is an internal DAC
output; and RLS_DELTA, in KΩ, is the resistance from pin
LS_DELTA to ground. Type 1206 SMD resistors must
be used for RLS_DELTA to handle the power dissipation.
When DP4 is high, the current output on IW current is
not affected.
DALPHA Block
The function of this block is a voltage subtracter. The
voltage on pin PWB, VPWB, is given by:
VPWB = 2 x VPWO_I - VDALPHA,
where VPWO_I and VDALPHA are the voltages on pins
PWO_I and DALPHA, respectively. In addition, the
magnitude of the output voltage VPWB is limited by
VPWMAX and VPWMIN, which are the voltages on pins
PWMAX and PWMIN.
When 2xVPWO_I - VDALPHA < VPWMIN, then VPWB = VPWMIN.
When 2xVPWO_I - VDALPHA, > VPWMAX, then VPWB =
VPWMAX.
The input voltage ranges of VPWMAX and VPWMIN are 0 to
VS2V9 which is the voltage input at S2V9 pin, and the
condition VPWMAX > VPWMIN must hold. Note that the
input voltage range of VDALPHA is -3V to +3.5V.
CAGAIN Block
This block is also an operational transconductance
amplifier (OTA). The voltage on VCAGAIN pin is the
input voltage, VVCAGAIN; the output current, ICAGAIN, is
delivered on pin CAGAIN. Let the voltages on pins
CDR, CAGS, CAGAIN and S2V9 be denoted as VCDR,
VCAGS, VCAGAIN, VS2V9, respectively. The relationship
between VVCAGAIN and ICAGAIN is given by:
When VCDR = 5V, VCAGS = 5V
ICAGAIN = 1.2 x VCAGAIN / (R108 ∥ R109) + (VS2V9 -
VCAGAIN) / R195,
When VCDR = 5V, VCAGS = 0V
ICAGAIN =
(VS2V9 - VCAGAIN) / R195
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