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參數(shù)資料
| 型號： | GAL16V8D-15QPN |
| 廠商： | Lattice Semiconductor Corporation |
| 文件頁數(shù)： | 26/26頁 |
| 文件大小： | 0K |
| 描述： | IC PLD 8MACRO 5.0V 15NS 20PDIP |
| 標準包裝： | 18 |
| 系列： | GAL®16V8 |
| 可編程類型： | EE PLD |
| 最大延遲時間 tpd(1)： | 15.0ns |
| 電壓電源 - 內(nèi)部： | 4.75 V ~ 5.25 V |
| 宏單元數(shù)： | 8 |
| 工作溫度： | 0°C ~ 75°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 20-DIP（0.300"，7.62mm） |
| 供應商設備封裝： | 20-PDIP |
| 包裝： | 管件 |
Specifications GAL16V8
7
In the Complex mode, macrocells are configured as output only or
I/O functions.
Architecture configurations available in this mode are similar to the
common 16L8 and 16P8 devices with programmable polarity in
each macrocell.
Up to six I/O's are possible in this mode. Dedicated inputs or
outputs can be implemented as subsets of the I/O function. The
two outer most macrocells (pins 12 & 19) do not have input capa-
bility. Designs requiring eight I/O's can be implemented in the
Registered mode.
All macrocells have seven product terms per output. One product
term is used for programmable output enable control. Pins 1 and
11 are always available as data inputs into the AND array.
The JEDEC fuse numbers including the UES fuses and PTD fuses
are shown on the logic diagram on the following page.
Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically.
Combinatorial I/O Configuration for Complex Mode
- SYN=1.
- AC0=1.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=1.
- Pin 13 through Pin 18 are configured to this function.
Combinatorial Output Configuration for Complex Mode
- SYN=1.
- AC0=1.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=1.
- Pin 12 and Pin 19 are configured to this function.
XOR
Complex Mode
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相關(guān)代理商/技術(shù)參數(shù) |
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| GAL16V8D-20LD/833 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High Performance E2CMOS PLD Generic Array Logic |
| GAL16V8D-20LD/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD |
| GAL16V8D-20LR/833 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High Performance E2CMOS PLD Generic Array Logic |
| GAL16V8D-20LR/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD |
| GAL16V8D-20QJI | 功能描述:SPLD - 簡單可編程邏輯器件 16 INPUT 8 OUTPUT 5V LOW POWER 20ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
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