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參數(shù)資料
| 型號： | GIGAPHY-SD |
| 英文描述： | GigaPHY-SD - GigaPHY-LAB-KT Gigabit Evaluation Board |
| 中文描述： | GigaPHY -處- GigaPHY，勞顧會的韓國電信千兆評估板 |
| 文件頁數(shù)： | 4/20頁 |
| 文件大小： | 1158K |
| 代理商： | GIGAPHY-SD |
GigaPHY
(TM)
-SD Device
GDPHYSD_1B
Eval Board
Operation
The GigaPHY eval board provides potential customers with a simple, easy-to-use evaluation tool
for understanding the function and performance of the AM79761 10-bit Gigabit Transceiver.
A 125MHz 3.3V crystal oscillator provides a reference clock (REFCLK) to the AM79761. The clock
trace has been minimized to provide the best signal quality possible. Since REFCLK is used to latch data
into the AM79761, the trace length between the REFCLK clock and the TXD[0-9] data should be kept
somewhat similar (i.e. within 1”) so as to maximize the timing margin for the chip generating the transmit
data. The recovered clocks, RCLK and RCLKN, can be monitored through the SMA connectors.
The TEST pins of the AM79761 are tied HIGH for manual switch operation. The EN_CDET pin, which
is set by a switch, allows SYNC detection and framing. When EN_CDET is enabled, the detection of
COMMA will generate a COM_DET, which is monitored by an LED. In order to select loopback mode, the
EWRAP must be HIGH which will cause the parallel input data TXD[0-9] be wrapped around inside the
AM79761 and outputed as RXD[0-9] and the TX[+/-] outputs will be held high.
The on board 125 MHz oscillator generates the transmit clock for the AM79761 (REFCLK). TXD[0-9]
is latched into the AM79761 on every rising edge of this clock. The AM79761 recovers the data with the
word-oriented clock (RBC-) at 62.5MHz.
An on-board diagnostic path is provided to allow testing of the board. The input parallel data can be
generated by a 10-bit switch or by a pre-programmed PAL. The 10-bit switch only allows a static 10 bit
word pattern but the PAL can be used to generate a longer repetitious word patterns. A more
sophisticated word pattern can be generated from a Pattern Generator through the pod connector. If non-
loopback mode is selected, the parallel, TXD[0-9], will be serialized by the AM79761 and pumped out
through the TX[+/-]. Then, the high-speed serial data is received through the RX[+/-] into the AM79761
and is deserialized to a 10-bit parallel data bus, RXD[0-9]. LED’s or a logic analyzer through the on-board
pod can monitor the RXD[0-9].
For a 50 ohm environment, the AM79761 transmitters PECL outputs drive 50 ohm traces with a 182
ohm current sinking resistor and an AC-coupled 0.01uF capacitor to the 50-ohm SMA connectors labeled
TX[+] (SMA1) and TX[-] (SMA2). The resistor-capacitor termination circuit are needed to supply current
and decouple the 3.3V-referenced PECL outputs of the AM79761 from the PECL-levels required on the
coaxial cable. The AM79761 receives differential PECL serial data from the coax cable on the 50-ohm
SMA connectors labeled RX+/-. This input is immediately AC-coupled through a 0.01uF capacitor and
terminated with 182-ohm pull-down resistors. The AM79761 provides internal resistors to set the DC Bias
to Vdd/2. The termination resistors and AC coupling caps are located as near as possible to the input pins
on the AM79761 to maximize signal quality.
The Evaluation board has voltage regulator that supplies the board with 3.3Volts. The input to the
voltage regulator can be from 5 volts DC to 12 volts DC from either a lab bench supply through PWR1 or
from a wall mounted supply through PWR2. The voltage regulator output can be shutdown with the
shutdown a switch [P1]. When LED13 is ON the regulator output is OFF.
PAL and Manual Switch Pattern Generator Settings
SEL[0] L
SEL[1] L
Undetermined
Undetermined
SEL[0] L
SEL[1] H
Pseudo-
random
SEL[0] H
SEL[1] L
00111100xx
Repeating 00111100xx
SEL[0] H
SEL[1] H
Alternating
Alternating +/- K28.5
Note; for the PAL to output the right data the Manual switch setting SW1 all have to be off.
Note; for the Manual Switch to work , the PAL has to be removed.
Last Updated 11/04/97
1997 Advanced Micro Devices
Trademark Information
4 of 7
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