參數(shù)資料
型號(hào)： GMS90L320
英文描述： 8-Bit Single-Chip Microcontrollers(低電壓,8位單片微控制器)
中文描述： 8位單芯片微控制器（低電壓，8位單片微控制器）
文件頁數(shù)： 11/46頁
文件大小： 683K
代理商： GMS90L320
GMS90C320
OCT. 2000 Ver 1.2
7
P2.0-P2.7
24-31
21-28
18-25
I/O
Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2
pins that have 1s written to them are pulled high by the internal
pull-up resistors and can be used as inputs. As inputs, port 2 pins
that are externally pulled low will source current because of the
pulls-ups (I
IL
, in the DC characteristics). Port 2 emits the high-
order address byte during fetches from external program memory
and during accesses to external data memory that use 16-bit
addresses (MOVX @DPTR). In this application it uses strong
internal pull-ups when emitting 1s. During accesses to external
data memory that use 8-bit addresses (MOVX @Ri), port 2 emits
the contents of the P2 special function register.
PSEN
32
29
26
O
The
Program Store Enable
The read strobe to external program memory when the device is
executing code from the external program memory. PSEN is acti-
vated twice each machine cycle, except that two PSEN activation
are skipped during each access to external data memory. PSEN
is not activated during fetches from internal program memory.
RESET
10
9
4
I
RESET
A high level on this pin for two machine cycles while the oscillator
is running resets the device. An internal diffused resistor to V
SS
permits power-on reset using only an external capacitor to V
CC
.
ALE
33
30
27
O
The
Address Latch Enable
Output pulse for latching the low byte of the address during an
access to external memory. In normal operation, ALE is emitted
at a constant rate of 1/6 the oscillator frequency, and can be used
for external timing or clocking. Note that one ALE pulse is skipped
during each access to external data memory.
EA
35
31
29
I
External Access Enable
EA must be external held low to enable the device to fetch code
from external program memory locations 0000
H
to FFFF
H
. If EA is
held high, the device executes from internal program memory
unless the program counter contains an address greater than its
internal memory size.
P0.0-P0.7
43-36
39-32
37-30
I/O
Port 0
Port 0 is an 8-bit open-drain bidirectional I/O port. Port 0 pins that
have 1s written to them float and can be used as high-impedance
inputs. Port 0 is also the multiplexed low-order address and data
bus during accesses to external program and data memory. In
this application it uses strong internal pull-ups when emitting 1s.
Port 0 also outputs the code bytes during program verification in
the GMS97C5x. External pull-up resistors are required during
program verification.
V
SS
22
20
16
-
Circuit ground potential
V
CC
44
40
38
-
Supply terminal
for all operating modes
N.C.
1,12,
23,34
-
6,17,
28,39
-
No connection
Symbol
Pin Number
Input/
Output
Function
P-LCC-44
P-DIP-40
P-MQFP-
44
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