參數(shù)資料
型號(hào): GS1511
英文描述: Formatter for GS1522 without ANC FIFOs
中文描述: 為GS1522沒有非國大FIFO的格式化
文件頁數(shù): 6/9頁
文件大?。?/td> 135K
代理商: GS1511
GENNUM CORPORATION
52248 - 4
6
G
23
F
Synchronous
wrt PCLK_IN
Input
Control Signal Input.
This signal indicates the ODD/EVEN field
of the input video data streams. Refer to Figure 4 for required
timing of F relative to LUMA (DATA_IN[19:10]) and CHROMA
(DATA_IN[9:0]). When the input video format is progressive
scan, F should remain low at all times.
26, 27, 28, 29,
30-34, 65, 66,
67,
71-75,
NC
N/A
No Connect.
Do not connect these pins.
35
TN
N/A
TEST
Test pin.
Used for test purposes only. This pin must be
connected to V
DD
for normal operation.
36
OEN
Non-
synchronous
Input
Control Signal Input.
Used to enable the DATA_OUT[19:0]
output bus or set it to a high Z state. When OEN is low, the
DATA_OUT[19:0] bus is enabled. When OEN is high, the
DATA_OUT[19:0] bus is disabled and in a high Z state.
64, 63, 62, 61,
60, 57 56, 55,
54, 53, 52, 49,
48, 45, 44, 43,
42, 41, 40, 39
DATA_OUT[19:0]
Synchronous
wrt PCLK_IN
Outputs
Output Data Bus.
The device generates a 20 bit wide data
stream running at 74.25 (or 74.25/1.001) MHz. DATA_OUT[19]
is the MSB and DATA_OUT[0] is the LSB.
70
TEST
N/A
TEST
Test Pin.
Used for test purposes only. This pin must be
connected to GND for normal operation.
103,104,105,
106, 107, 108,
111, 112, 113,
114
DATA_IN [19:10]
(LUMA channel)
Synchronous
wrt PCLK_IN
Input
Input Data Bus.
LUMA CHANNEL. DATA_IN [19] is the MSB of
the LUMA input signal (pin 103). DATA_IN [10] is the LSB of the
LUMA input signal (pin 114).
117, 118, 119,
120, 121, 122,
123, 124, 125,
126
DATA_IN [9:0]
(CHROMA channel)
Synchronous
wrt PCLK_IN
Input
CHROMA Input Data Bus.
CHROMA CHANNEL DATA_IN [9] is
the MSB of the CHROMA signal (pin 117). DATA_IN [0] is the
LSB of the CHROMA signal (pin 126).
1.2 PIN DESCRIPTIONS
(Continued)
PIN NUMBER
NAME
TIMING
TYPE
DESCRIPTION
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