- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370379 > GS1535 Multi-rate Reclocker for HD-SDI. SD-SDI & DVB-ASI. 3.3V supply. PDF資料下載
參數(shù)資料
| 型號： | GS1535 |
| 英文描述： | Multi-rate Reclocker for HD-SDI. SD-SDI & DVB-ASI. 3.3V supply. |
| 中文描述： | 多速率時鐘恢復(fù)器的HD - SDI的。標(biāo)清SDI |
| 文件頁數(shù)： | 7/39頁 |
| 文件大小： | 631K |
| 代理商： | GS1535 |
第1頁第2頁第3頁第4頁第5頁第6頁當(dāng)前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁
GENNUM CORPORATION
21498-1
7 of 39
G
27
CS_TMS
Synchronous
with
SCLK_TCK
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Chip Select / Test Mode Select
Host Mode (JTAG/HOST = LOW)
CS_TMS operates as the host interface chip select, CS, and is active
LOW.
JTAG Test Mode (JTAG/HOST = HIGH)
CS_TMS operates as the JTAG test mode select, TMS, and is active HIGH.
28
SDOUT_TDO
Synchronous
with
SCLK_TCK
Output
CONTROL SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
Serial Data Output / Test Data Output
Host Mode (JTAG/HOST = LOW)
SDOUT_TDO operates as the host interface serial output, SDOUT, used to
read status and configuration information from the internal registers of the
device.
JTAG Test Mode (JTAG/HOST = HIGH)
SDOUT_TDO operates as the JTAG test data output, TDO.
29
SDIN_TDI
Synchronous
with
SCLK_TCK
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Serial Data In / Test Data Input
Host Mode (JTAG/HOST = LOW)
SDIN_TDI operates as the host interface serial input, SDIN, used to write
address and configuration information to the internal registers of the
device.
JTAG Test Mode (JTAG/HOST = HIGH)
SDIN_TDI operates as the JTAG test data input, TDI.
30
SCLK_TCK
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Serial Data Clock / Test Clock.
Host Mode (JTAG/HOST = LOW)
SCLK_TCK operates as the host interface burst clock, SCLK. Command
and data read/write words are clocked into the device synchronously with
this clock.
JTAG Test Mode (JTAG/HOST = HIGH)
SCLK_TCK operates as the JTAG test clock, TCK.
32
BLANK
Synchronous
with PCLK
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to enable or disable input data blanking.
When set LOW, the luma and chroma input data is set to the appropriate
blanking levels. Horizontal and vertical ancillary spaces will also be set to
blanking levels.
When set HIGH, the luma and chroma input data pass through the device
unaltered.
33, 68
CORE_GND
-
Power
Ground connection for the digital core logic. Connect to digital GND.
1.2 PIN DESCRIPTIONS (CONTINUED)
PIN
NUMBER
NAME
TIMING
TYPE
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS1560A* | Reclocking deserializer for HD-SDI. SD-SDI & DVB-ASI with loop thru cable driver. 3.3/1.8V supply. |
| GS1561* | Reclocking deserializer for HD-SDI. SD-SDI & DVB-ASI without loop thru cable driver. 3.3/1.8V supply. |
| GS15T48-5 | 15W DC-DC CONVERTER |
| GS15T48 | |
| GS15T5-5.2 | DC-to-DC Voltage Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS1535A | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535A_06 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535ACFUE3 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535BCFUE3 | 制造商:Gennum Corporation 功能描述:IC RELOCKER HD/SD/ASI 64LQFP 制造商:Gennum Corporation 功能描述:IC, RELOCKER, HD/SD/ASI, 64LQFP 制造商:Gennum Corporation 功能描述:IC, RELOCKER, HD/SD/ASI, 64LQFP; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Digital IC Case Style:LQFP; No. of Pins:64; Operating Temperature Min:0C; Operating Temperature Max:70C; MSL:MSL 3 - 168 hours; SVHC:No SVHC |
| GS1535-CFU | 制造商:Rochester Electronics LLC 功能描述: 制造商:Gennum Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。