參數(shù)資料
型號(hào): GS1560A*
英文描述: Reclocking deserializer for HD-SDI. SD-SDI & DVB-ASI with loop thru cable driver. 3.3/1.8V supply.
中文描述: 時(shí)鐘重計(jì)解串器的HD - SDI的。標(biāo)清SDI
文件頁(yè)數(shù): 45/55頁(yè)
文件大?。?/td> 922K
GENNUM CORPORATION
27360 - 2
45 of 55
G
3.10.6.5 HD Line Number Error Correction
In HD mode, the GS1560A will calculate and insert line
numbers into the Y and C channels of the output data
stream.
Line number generation is in accordance with the relevant
HD video standard as determined by the device, (see
Section 3.10.4).
This feature is enabled when SD/HD = LOW, and the
LNUM_INS bit of the IOPROC_DISABLE register is set LOW.
3.10.6.6 TRS Error Correction
When TRS error correction and insertion is enabled, the
GS1560A will generate and insert 10-bit TRS code words as
required.
TRS word generation will be performed in accordance with
the timing parameters generated by the flywheel to provide
an element of noise immunity. As a result, TRS correction
will only take place if the flywheel is enabled, (FW_EN/DIS =
HIGH).
In addition, the TRS_INS bit of the IOPROC_DISABLE
register must be set LOW.
3.10.7 EDH Flag Detection
As described in Section 3.10.5.2, the GS1560A can detect
EDH packets in the received data stream. The EDH flags for
ancillary data, active picture and full field areas are
extracted from the detected EDH packets and placed in the
EDH_FLAG register of the device (Table 15).
One set of flags is provided for both fields 1 and 2. Field 1
flag data will be overwritten by field 2 flag data.
The EDH_FLAG register may be read by the host interface
at any time during the received frame except on the lines
defined in SMPTE RP165 where these flags are updated.
NOTE 1: By programming the ANC_TYPE1 register (005h)
with the DID word for EDH ancillary packets, the application
layer may detect a high-to-low transition on either the YANC
or CANC output pin of the GS1560A to determine (a) when
EDH packets have been received by the device, and (b)
when the EDH_FLAG register can be read by the host
interface. See Section 3.10.2 for more information on
ancillary data detection and indication.
NOTE 2: The bits of the EDH_FLAG register are sticky and
will not be cleared by a read operation. If the GS1560A is
decoding a source containing EDH packets, where EDH
flags may be set, and the source is replaced by one without
EDH packets, the EDH_FLAG register will not be cleared.
NOTE 3: The GS1560A will detect EDH flags, but will not
update the flags if an EDH CRC error is detected.
Gennum's GS1532 Multi-Rate Serializer allws the host to
individually set EDH flags.
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