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參數(shù)資料
| 型號： | GS820322T-138 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | DRAM |
| 英文描述： | 64K x 32 2M Synchronous Burst SRAM |
| 中文描述： | 64K的× 32 200萬同步突發(fā)靜態(tài)存儲器 |
| 文件頁數(shù)： | 11/23頁 |
| 文件大?。?/td> | 760K |
| 代理商： | GS820322T-138 |
Rev: 1.04 2/2001
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
11/23
2000, Giga Semiconductor, Inc.
Preliminary
GS82032T/Q-150/138/133/117/100/66
AC Test Conditions
Notes:
1.
2.
3.
4.
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in
Fig. 1
unless otherwise noted.
Output Load 2 for t
LZ
, t
HZ
, t
OLZ
and t
OHZ
.
Device is deselected as defined by the Truth Table.
Parameter
Conditions
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
Output load
2. 3V
0.2 V
1 V/ns
1.25 V
1.25 V
Fig. 1& 2
DC Electrical Characteristics
Parameter
Symbol
Test Conditions
Min
Max
Input Leakage Current
(except mode pins)
I
IL
V
IN
= 0 to V
DD
–1 uA
1 uA
ZZ Input Current
I
INZZ
V
DD
≥
V
IN
≥
V
IH
0 V
≤
V
IN
≤
V
IH
V
DD
≥
V
IN
≥
V
IL
0 V
≤
V
IN
≤
V
IL
Output Disable,
V
OUT
= 0 to V
DD
I
OH
= –4 mA, V
DDQ
= 2.375 V
I
OH
= –4 mA, V
DDQ
= 3.135 V
I
OL
= 4 mA
–1 uA
–1 uA
1 uA
300 uA
Mode Pin Input Current
I
INM
–300 uA
–1 uA
1 uA
1 uA
Output Leakage Current
I
OL
–1 uA
1 uA
Output High Voltage
V
OH
V
OH
V
OL
1.7 V
Output High Voltage
2.4 V
Output Low Voltage
0.4 V
DQ
VT = 1.25 V
50
30pF
*
DQ
2.5 V
Output Load 1
Output Load 2
225
225
5pF
*
* Distributed Test Jig Capacitance
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