參數(shù)資料
型號: GS8322ZV36B-200
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 36Mb Pipelined and Flow Through Synchronous NBT SRAM
中文描述: 1M X 36 ZBT SRAM, 7.5 ns, PBGA119
封裝: 14 X 22 MM, 1.27 PITCH, FPBGA-119
文件頁數(shù): 20/39頁
文件大?。?/td> 975K
代理商: GS8322ZV36B-200
AC Test Conditions
Parameter
Conditions
Input high level
V
DD
– 0.2 V
Input low level
0.2 V
Input slew rate
1 V/ns
Input reference level
V
DD
/2
Output reference level
V
DDQ
/2
Output load
Fig. 1
Notes:
1.
2.
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in
Fig. 1
unless otherwise noted.
Device is deselected as defined by the Truth Table.
3.
GS8322ZV18(B/E)/GS8322ZV36(B/E)/GS8322ZV72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03a 2/2006
20/39
2002, GSI Technology
DQ
V
DDQ/2
50
30pF
*
Output Load 1
* Distributed Test Jig Capacitance
DC Electrical Characteristics
Parameter
Symbol
Test Conditions
Min
Max
Input Leakage Current
(except mode pins)
I
IL
V
IN
= 0 to V
DD
1 uA
1 uA
ZZ Input Current
I
IN1
V
DD
V
IN
V
IH
0 V
V
IN
V
IH
V
DD
V
IN
V
IL
0 V
V
IN
V
IL
1 uA
1 uA
1 uA
100 uA
FT, SCD, and ZQ Input Current
I
IN2
100 uA
1 uA
1 uA
1 uA
Output Leakage Current
I
OL
Output Disable, V
OUT
= 0 to V
DD
1 uA
1 uA
Output High Voltage
V
OH1
I
OH
=
4 mA, V
DDQ
= 1.6 V
V
DDQ
– 0.4 V
Output Low Voltage
V
OL1
I
OL
= 4 mA, V
DD
= 1.6 V
0.4 V
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