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參數(shù)資料

型號(hào)：	GS8322ZV72C-225
廠(chǎng)商：	GSI TECHNOLOGY
元件分類(lèi)：	DRAM
英文描述：	36Mb Pipelined and Flow Through Synchronous NBT SRAM
中文描述：	512K X 72 ZBT SRAM, 7 ns, PBGA209
封裝：	14 X 22 MM, 1 MM PITCH, BGA-209
文件頁(yè)數(shù)：	7/39頁(yè)
文件大?。?/td>	975K
代理商：	GS8322ZV72C-225

GS8322ZV18(B/E)/GS8322ZV36(B/E)/GS8322ZV72(C)

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Rev: 1.03a 2/2006

7/39

2002, GSI Technology

GS8322ZV18/36 119-Bump BGA Pin Description

Symbol

Type

Description

A

0

, A

1

I

Address field LSBs and Address Counter Preset Inputs

An

I

Address Inputs

DQ

A

DQ

B

DQ

C

DQ

D

I/O

Data Input and Output pins

B

A

, B

B

, B

C

, B

D

I

Byte Write Enable for DQ

A

, DQ

B

, DQ

C

, DQ

D

I/Os; active low

NC

—

No Connect

CK

I

Clock Input Signal; active high

CKE

I

Clock Enable; active low

W

I

Write Enable; active low

E

1

I

Chip Enable; active low

E

3

I

Chip Enable; active low

E

2

I

Chip Enable; active high

G

I

Output Enable; active low

ADV

I

Burst address counter advance enable

ZZ

I

Sleep mode control; active high

FT

I

Flow Through or Pipeline mode; active low

LBO

I

Linear Burst Order mode; active low

ZQ

I

FLXDrive Output Impedance Control

Low = Low Impedance [High Drive], High = High Impedance [Low Drive])

TMS

I

Scan Test Mode Select

TDI

I

Scan Test Data In

TDO

O

Scan Test Data Out

TCK

I

Scan Test Clock

V

DD

I

Core power supply

V

SS

I

I/O and Core Ground

V

DDQ

I

Output driver power supply

BPR1999.05.18

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