參數(shù)資料
型號(hào): GS84036
廠商: GSI TECHNOLOGY
英文描述: 4Mb(128K x 36Bit) Synchronous Burst SRAM(4M位(128K x 36位)同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
中文描述: 4Mb的(128K的x 36Bit)同步突發(fā)靜態(tài)存儲(chǔ)器(4分位(128K的× 36位)同步靜態(tài)隨機(jī)存儲(chǔ)器(帶2位脈沖地址計(jì)數(shù)器))
文件頁(yè)數(shù): 14/31頁(yè)
文件大小: 627K
代理商: GS84036
Rev: 2.05 6/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
14/31
1999, Giga Semiconductor, Inc.
.
GS84018/32/36T/B-180/166/150/100
Simplified State Diagram with G
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
W
R
R
W
R
X
X
X
CR
R
CW
CR
CR
W
CW
W
CW
Notes:
1.
2.
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from Read cycles to Write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal Read cycles.
Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
3.
相關(guān)PDF資料
PDF描述
GS840E18A 4Mb(256K x 18Bit) Synchronous Burst SRAM(4M位(256K x 18位)同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
GS840E32A 4Mb(128K x 32Bit) Synchronous Burst SRAM(4M位(128K x 32位)同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
GS840E36A 4Mb(128K x 36Bit) Synchronous Burst SRAM(4M位(128K x 36位)同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
GS840E18 4Mb(256K x 18Bit) Synchronous Burst SRAM(4M位(256K x 18位)同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
GS840E32 4Mb(128K x 32Bit) Synchronous Burst SRAM(4M位(128K x 32位)同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
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