參數(shù)資料
型號: GS8644ZV72C-250
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 72Mb Pipelined and Flow Through Synchronous NBT SRAM
中文描述: 1M X 72 ZBT SRAM, 6.5 ns, PBGA209
封裝: 14 X 22 MM, 1 MM PITCH, BGA-209
文件頁數(shù): 3/37頁
文件大?。?/td> 776K
代理商: GS8644ZV72C-250
Product Preview
GS8644ZV18(B/E)/GS8644ZV36(B/E)/GS8644ZV72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 11/2004
3/37
2003, GSI Technology
GS8644ZV72 209-Bump BGA Pin Description
Symbol
Type
Description
A
0
, A
1
I
Address field LSBs and Address Counter Preset Inputs.
A
I
Address Inputs
DQ
A
DQ
B
DQ
C
DQ
D
DQ
E
DQ
F
DQ
G
DQ
H
I/O
Data Input and Output pins
B
A
, B
B
I
Byte Write Enable for DQ
A
, DQ
B
I/Os; active low
B
C
,B
D
I
Byte Write Enable for DQ
C
, DQ
D
I/Os; active low
B
E
, B
F
, B
G
,B
H
I
Byte Write Enable for DQ
E
, DQ
F
, DQ
G
, DQ
H
I/Os; active low
NC
No Connect
CK
I
Clock Input Signal; active high
E
1
I
Chip Enable; active low
E
3
I
Chip Enable; active low
E
2
I
Chip Enable; active high
G
I
Output Enable; active low
ADV
I
Burst address counter advance enable
ZZ
I
Sleep Mode control; active high
FT
I
Flow Through or Pipeline mode; active low
LBO
I
Linear Burst Order mode; active low
MCH
I
Must Connect High
MCH
I
Must Connect High
MCL
Must Connect Low
W
I
Write Enable; active low
ZQ
I
FLXDrive Output Impedance Control
Low = Low Impedance [High Drive],
High = High Impedance [Low Drive]
CKE
I
Clock Enable; active low
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