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參數(shù)資料
| 型號： | GS880E18GT-66I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 512K X 18 CACHE SRAM, 18 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 25/25頁 |
| 文件大?。?/td> | 850K |
| 代理商： | GS880E18GT-66I |
Rev: 1.11 11/2000
9/25
2000, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary
GS880E18/32/36T-11/11.5/100/80/66
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
W
R
W
R
X
Si
m
pl
e
Sy
nc
hr
on
ou
s
O
pe
ra
tio
n
Si
m
pl
e
Bu
rs
tS
yn
ch
ro
no
us
O
pe
ra
tio
n
CR
R
CW
CR
Simplified State Diagram
Notes:
1. The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
2. The upper portion of the diagram assumes active use of only the Enable (E1, E2, and E3) and Write (BA, BB, BC, BD, BW, and GW) control
inputs, and that ADSP is tied high and ADSC is tied low.
3. The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and
assumes ADSP is tied high and ADV is tied low.
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| GS880F18T-14T | 512K X 18 CACHE SRAM, 14 ns, PQFP100 |
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| GS88136T-11.5IT | 256K X 36 CACHE SRAM, 11.5 ns, PQFP100 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| GS880E18T | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs |
| GS880E18T-100 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs |
| GS880E18T-100I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs |
| GS880E18T-11 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs |
| GS880E18T-11.5 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs |
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